Hi,
I want to buid petalinux on my TE0720 but it doesn't boot. I do everything like this https://wiki.trenz-electronic.de/display/PD/Design+Flow , then I copy BOOT.bin and image.ub to my sd card but when I connect with the zynq with putty nothing is happen. Should I do something more?
does PL get configured? the Done led should go off then, if not then you have already problem in FSBL and nothing is actually booting.
Thanks for your response. No, the led is on. How correctly configure the PL and fsbl. I do everything with the manual but something is wrong
FSBL loads the PL, if you made the BOOT.BIN correctly.
And SDK should generate working FSBL if you had the PS7 setting in vivado correct.
http://www.trenz-electronic.de/de/download/d0/Trenz_Electronic/d1/TE0720-GigaZee/d2/reference_designs/d3/2015.4.html
there are ready made HDF files, FSBL.eld and helloworld.elf files for TE0720. Make sure the BOOT.BIN you make from the pre built images work.
Then you can replace hello.elf with your uboot.elf and check you get uboot prompt..
BOOT.bin from this website works. but when i try my BOOT.bin it doosn't. I create project:
petalinux-create -t project -s Xilinx-ZC702-v2014.4-final.bsp
and I copy BOOT.bin and image.ub from pre_built to my SD card. What i'm doing wrong? Should I do something more?
if you use ZC702 files then EVERYTHING is wrong...!!
you created files for Xilinx ZC702 board, so those files can not work on TE0720.
OK. I suggested to the xilinx manual. my fault.
But it still doesn't work
1. petalinux-create -t project -n TE_system --template zynq
2. petalinux-config --get-hw-description
3. petalinux-build
4. petalinux-package --boot --u-boot --fpga subsystems/linux/hw-description/system.bit --fsbl images/linux/zynq_fsbl.elf --force
I do everything what is on the trenz website but it still doesn't work. Where can be a mistake?
1) did you use correct HDF file?
2) what happens? does FSBL start?
For some reason in some cases the FSBL generated by petalinux is not working, we usually use generate uboot and image with petalinux and fsbl and boot.bin with SDK, I am not sure why, and not sure if it still is or may be a problem with 2015.4, we did see that with earlier releases.
in all cases, where there are problems it is recommended to enable uart output in FSBL then you can see what actually happens at the boot.
Yes, the hdf is correct. I have also tried to do BOOT.bin with SDK but it also doesn't work. I create BOOT.bin with fsbl.elf u-boot.elf dtb and uImage.
fsbl.elf and u-boot.elf i have after 'petalinux-build'
The green "ready" led never turn off
if done led remains on the there is problem with FSBL and no need look further.
unless FPGA is configured uboot is not started.
as previously said we have seen that petalinux made fsbl does not work for unexplained reasons. So we make
u-boot.elf
image.ub
with petalinux
fsbl.elf
with SDK not petalinux!
and then it sure works here.
Where did you take the HDF ? It should match the module version you are using.
Thanks for your help but it still doesn't work.
I've created fsbl with sdk. u-boot and uImage i've from petalinux-build command (is it OK?) I create BOOT.bin file with sdk but green led doesn't turn off
if DONE led does not go off then there is a problem with FSBL and not petalinux kernel.
did you turn on debug log in FSBL? can you attach the log file?
how to do this? I 've added #define FSBL_DEBUG_INFO 0x00000003 to fsbl_debug.h file but i can't see any logs
https://wiki.trenz-electronic.de/display/PD/Zynq+Troubleshooting+Guide
I added a screenshot for you to take a look.
There was also already a hint that IF DDR init does not work, then FSBL dies without saying anything even if debug is enabled.
http://imgur.com/RCia2vv (http://imgur.com/RCia2vv) SD INIT fail
https://wiki.trenz-electronic.de/display/PD/SD+Card+Interface
check that MIO pullups are disabled and SDIO clock is 100mhz or lower
and please do not use 2015.3, this is interim release, only EVEN numbers like 2015.4 are fully supported with corresponding petalinux release.
There are NO petalinux releases for odd numbers of Vivado!
It, works. I've changed the clock from 125MHz to 50MHz.
good this is some Vivado, vs sdk fsbl mini bug, Vivado wants to default to INVALID clock, what yields in freeze at clock search lookup function in FSBL.
FSBL works but i have a problem with petalinux. I have U-BOOT-PETALINUX> but i think that it's problem with file system or device tree
you mean that uboot does not automatically boot the image.ub from sd card?
this is just a setting of petalinux, check the boot media, etc. i do not think there is an issue with dev tree of fs.
it was problem with image.ub but now it works. I have another question. Why the numbers of gpio starts from 138?
this is related to Linux internals and driver enumeration is beyond our control and not related to TE0720.
This weird numbering irritates us too, but there is nothing we can do with that. Please use Linux and Xilinx docs and guides to decode and understand this numbering.
What we can help in this regard is a warning that if you add lots of GPIO to the system, so that the linux GPIO count would exceed 256, then linux kernel would no longer boot at all due to bug in gpio driver. So as PS GPIO allocated too much GPIO (some are unused) then if you add all TE0720 to AXI_GPIO, and build linux, you get crashing kernel due to 256 pins bug in gpio kernel driver.
This all we can comment help on gpio numbering.-
Thanks. Petalinux works but I have a problem with uart connection. I've routed uart to emio and now when i try to send something: echo 'abc' > /dev/ttyPS1 i have no response. echo for ttyPS0 works correctly. there is also problem with ethernet connection. I set IP and netmask but i can't connect with my PC
There are too many unknown for us to help you right now. There are many possible places where a problem can be.
To our knowledge there are no issues related to UART over EMIO usage related to TE0720 and linux.
The problem is in system-top.dts. I added
{
aliases{
ethernet0=&gem0;
};
};
&gem0 {
phy-handle = <&phy0>;
ps7_ethernet_0_mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@0 {
compatible = "marvell,88e1510";
device_type = "ethernet-phy";
reg = <0>;
} ;
} ;
};
But something is wrong. ifconfig works corectly but I can't connect with my PC
I am sorry, what problem you have now?
You have talked about different problems in one and the same thread. This is not good practice. If you have now a new problem, then please open new topic.
I can only repeat that we are not aware of UART, UART EMIO or ethernet PHY problems related to TE0720 and petalinux.