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1
Trenz Electronic FPGA Modules / Zynqberry demo1
« Last post by Gloria on Today at 12:01:57 PM »
After the win_setup_cmd, I open the project by vivado and write TE::pr_programming_flash swapp u-boot according to the instructions.
However,
TE::pr_program_flash -swapp u-boot
Start Flash Programming
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
INFO: [Labtools 27-2222] Launching hw_server...
INFO: [Labtools 27-2221] Launch Output:

****** Xilinx hw_server v2020.1
  **** Build date : May 27 2020 at 20:24:38
    ** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.


INFO: [Labtools 27-3415] Connecting to cs_server url TCP:localhost:3042
INFO: [Labtools 27-3417] Launching cs_server...
INFO: [Labtools 27-2221] Launch Output:


****** Xilinx cs_server v2020.1.0
  **** Build date : May 14 2020-09:10:29
    ** Copyright 2017-2020 Xilinx, Inc. All Rights Reserved.



connect_hw_server: Time (s): cpu = 00:00:03 ; elapsed = 00:00:08 . Memory (MB): peak = 1150.301 ; gain = 0.012
WARNING: [Labtoolstcl 44-128] No matching hw_devices were found.
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/251633005930A
open_hw_target: Time (s): cpu = 00:00:05 ; elapsed = 00:00:07 . Memory (MB): peak = 2439.836 ; gain = 1289.535
INFO: [Labtools 27-1434] Device xc7z010 (JTAG device index = 1) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Xicom 50-100] The current boot mode is QSPI.
If flash programming fails, configure device for JTAG boot mode and try again.
Problem in running uboot
Flash programming initialization failed.
ERROR: [Labtools 27-3161] Flash Programming Unsuccessful
ERROR: [TE_PR-108] Script (TE::VLAB::hw_program_flash) failed: ERROR: [Common 17-39] 'program_hw_cfgmem' failed due to earlier errors.
.
ERROR: (TE_PR-108) Script (TE::VLAB::hw_program_flash) failed: ERROR: [Common 17-39] 'program_hw_cfgmem' failed due to earlier errors.
.
2
Trenz Electronic FPGA Modules / Zynqberry demo1
« Last post by Gloria on Today at 10:46:57 AM »
Hi, I want to download the demo1 to TE0726-03M.
I wonder know that if the build version of demo1 make me no need to install petalinux?
Should I copy the image.ub and init.sh to my SD card to test demo1?
I just want to test demo1 on my board, but I do not want to install petalinux and linux.
3
Trenz Electronic FPGA Modules / Re: FMC fan on tef1001
« Last post by JH on May 07, 2021, 02:33:06 PM »
Hi,
https://wiki.trenz-electronic.de/display/PD/TEF1001+CPLD#TEF1001CPLD-FANFMC
this should be enabled when you connect FMC card which use  FMC preset signal .

--> I assume you you has PCB Rev02 and bough it after 2019 or newer?
br
John
4
Trenz Electronic FPGA Modules / FMC fan on tef1001
« Last post by mshin on May 07, 2021, 12:45:20 PM »
Hello Trenz buddies

I have a TEF1001 board and have attached a daughter board on FMC. I need to turn the FMC fan on. I would appreciate it if you provide a quick guide on this.

Regards
Meysam
5
Hi,
if reboot has help, maybe kill one time the hw_server.exe manually on win task manager if you, this helps also in many case when you has problem with JTAG.
br
John
6
Trenz Electronic FPGA Modules / Re: don't run petalinux 2017.4 on TE0720 board
« Last post by JH on May 06, 2021, 11:59:06 AM »
Hi,
please read also this pdf of the old design (same place like the design file download):
te0720-test_board-vivado_2017.4-build_07_v22-20190214_0648.pdf
we have also done manually changes on the petalinx project (in step 3 you say you has generate a new one, this means really new petalinux project or did you use our template?).

sorry I can give only limited support of this old reference designs.

br
John
7
Trenz Electronic FPGA Modules / don't run petalinux 2017.4 on TE0720 board
« Last post by Hamidshafaghi on May 06, 2021, 08:34:52 AM »
Hi my friends .
I have two board of Trenz electronic , TE0720 (main board) and TE0701-06 (carrier board).

I go the steps in  " https://wiki.trenz-electronic.de/display/PD/PetaLinux+KICKstart#PetaLinuxKICKstart-PetaLinux2017.4 " for run petalinux on TE0720 but after packaging and copy BOOT.BIN and image.ub on SD card petalinux don't run !!! :(

when I use example in one file of " https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0720/Reference_Design/2017.4/test_board " not problems.

The steps I have taken are as follows :
1- Install vivado 2017.4 and  petalinux 2017.4 and bsp ZED-board  (Only to test my installation)
2- Run settings.sh in petalinux folder
3- Create new project by petalinux (zynq)
4- Create new project by vivado and export hard ware (.hdf)
5- Change path of CONFIG_TMP_DIR_LOCATION variable to your project path "<plnx-proj-root>/build/tmp" manually
6- Petalinux-config --get-hw-description
7- Run:$ petalinux-config
8- Run:$ petalinux-config -c kernel
9- Run:$ petalinux-config -c rootfs
10- Run:$ petalinux-build
11- Run:$ petalinux-package --boot --fsbl /.../zynq_fsbl.elf --fpga /.../design_1_wrapper.bit  --u-boot
12- copy BOOT.BIN and image.ub from images folder to SD card

I do not know where the problem comes from?
Please help me. thanks
8
Hello Deepak,
sorry, but I can't help you to debug your project.
The only thing that I can mention that you need to check SPI settings,
Frequency, CPHA, CPOL should correspond device you trying to communicate.

Best regards
Oleksandr Kiyenko
9
Solved by rebooting the PC  :)
10
Hi all,

I am unable to program the TE0802 R5 processor, as it shows this error:

xsct% Info: Cortex-R5 #0 (target 8) Stopped at 0x0 (Cannot resume. AP transaction error, DAP status 0x30000021)

I am generating a project with the default Trenz configuration, it used to work fine. Then I tried to configure the FPGA using some bitstream file using xsct (fpga <bitstream>)

Now I am back to my previous project with the SDK, without any changes in SW or FPGA. I see the PL gets written but now I cannot access the R5.

Any ideas?

xsct% targets
  1  PS TAP
     2  PMU
     3  PL
       13  Legacy Debug Hub
  4  PSU (JTAG port open error. AP transaction error, DAP status 0x30000021)
     7  RPU
        8* Cortex-R5 #0 (Cannot resume. AP transaction error, DAP status 0x30000021)
        9  Cortex-R5 #1 (Reset)
    10  APU
       11  Cortex-A53 #0 (Breakpoint, EL3(S)/A64)
       12  Cortex-A53 #1 (Power On Reset)



Thanks,
Juan.
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