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UltraScale / Re: TE0820: Problems adding Cortex-R5 to device tree
« Last post by null0x on November 27, 2021, 01:43:02 PM »

thanks for the reply, but apparently you misunderstood me: I am well aware that PetaLinux cannot be run on the Cortex-R5, but I've never planned to do so. Instead, I'd like to execute a FreeRTOS-based application (for now just "Hello World") on the R5.

More precisely, PetaLinux runs perfectly fine on the Cortex-A53 and now, I want to make use of the remoteproc framework. There is quite some information out there and as far as I know it is crucial to correctly specify the device tree. For instance, some helpful information are here on page 36 and 39:

But the device tree needs to be changed for the chip I have. Unfortunately, I don't find any hints how to do you. The previously attached device tree is made for a 2GB version, but I have only 1GB (3eg_1e_1gb). I think this is why I get the memory error.

Does somebody know how to properly configure the device tree such that I run an application on the R5?

UltraScale / Re: TE0820: Problems adding Cortex-R5 to device tree
« Last post by JH on November 26, 2021, 09:38:39 PM »
-->  you can't run Linux on R5 as it doesn't have MMU.

UltraScale / TE0820: Problems adding Cortex-R5 to device tree
« Last post by null0x on November 26, 2021, 04:38:37 PM »

some time ago I purchased a TE0820 (1 GB version) that has a Zync Ultrascale+ ZU3EG-1E on top. The Trenz reference design for PetaLinux 2019.2 (3eg_1e_1gb) allowed me to successfully generate a working embedded Linux image for the Cortex-A53. Now, I'd like to execute code on the Cortex-R5 by using the remoteproc environment.

For this purpose I copy-pasted the cortex-r5 configuration from another device tree into mine, but - to be honest - without actually understanding what I am doing. The full device tree is attached to this question. The interesting part is the following:

Code: [Select]
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
rproc_0_dma: rproc@46d00000 {
compatible = "shared-dma-pool";
reg = <0x0 0x46d00000 0x0 0x100000>;
rproc_0_reserved: rproc@3ed00000 {
reg = <0x0 0x3ed00000 0x0 0x8000000>;
zynqmp-rpu {
compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
#address-cells = <2>;
#size-cells = <2>;
core_conf = "split";
r5_0: r5@0 {
#address-cells = <2>;
#size-cells = <2>;
memory-region = <&rproc_0_reserved>, <&rproc_0_dma>;
pnode-id = <0x7>;
mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
mbox-names = "tx", "rx";
tcm_0_a: tcm_0@0 {
reg = <0x0 0xFFE00000 0x0 0x10000>;
pnode-id = <0xf>;
tcm_0_b: tcm_0@1 {
reg = <0x0 0xFFE20000 0x0 0x10000>;
pnode-id = <0x10>;

zynqmp_ipi1 {
compatible = "xlnx,zynqmp-ipi-mailbox";
interrupt-parent = <&gic>;
interrupts = <0 29 4>;
xlnx,ipi-id = <7>;
#address-cells = <1>;
#size-cells = <1>;
/* APU<->RPU0 IPI mailbox controller */
ipi_mailbox_rpu0: mailbox@ff90000 {
reg = <0xff990600 0x20>,
<0xff990620 0x20>,
<0xff9900c0 0x20>,
<0xff9900e0 0x20>;
reg-names = "local_request_region",
#mbox-cells = <1>;
xlnx,ipi-id = <1>;

Once PetaLinux starts I get promising kernel output, stating that the R5 is available:

Code: [Select]
[    4.614052] zynqmp_r5_remoteproc zynqmp-rpu: RPU core_conf: split
[    4.620294]  r5@0: DMA mask not set
[    4.623799]  r5@0: assigned reserved memory node rproc@46d00000
[    4.629852] remoteproc remoteproc0: r5@0 is available

I created a FreeRTOS-based HelloWorld program with Vitis and tried to execute it. Unfortunately, it fails

Code: [Select]
[  326.738741] remoteproc remoteproc0: powering up r5@0
[  326.753832] remoteproc remoteproc0: Booting fw image helloworld, size 588476
[  326.764073] remoteproc remoteproc0: bad phdr da 0x100000 mem 0x24a70
[  326.770422] remoteproc remoteproc0: Failed to load program segments: -22
[  326.777206] remoteproc remoteproc0: Boot failed: -22
-sh: echo: write error: Invalid argument

I have the impression that the device tree is wrongly configured. Could you please explain me how to properly configure the cortex-r5 for 3eg_1e_1gb?

Thank you very much.

Trenz Electronic FPGA Modules / Re: TE0726-03-07S-1C and reference designs issues
« Last post by JH on November 26, 2021, 02:51:07 PM »
it looks like you use our template correct?
Did you run hw import of the XSA file before you run build?
Do you use a supported Linux version for petalinux built enviroment? Did you  install all neccesary packages? See:
Can you try out one time prebuilt xsa from a dual core variant (we generate linux files with a dual core variant, this should work also on the single core.) So you can check if single core xsa is the problem.

Trenz Electronic FPGA Modules / TE0726-03-07S-1C and reference designs issues
« Last post by rtx on November 26, 2021, 01:19:29 PM »
I'm trying to follow the TE0726 Test Board example with TE0726-03-07S-1C board. When I create my PetaLinux project with exported .xsa-file, after the command
> petalinux-build
I receive an error:

ERROR: device-tree-xilinx-v2020.2+gitAUTOINC+f725aaecff-r0 do_compile: Error executing a python function in exec_python_func() autogenerated:

The stack trace of python calls that resulted in this exception/failure was:
File: 'exec_python_func() autogenerated', lineno: 2, function: <module>
*** 0002:devicetree_do_compile(d)
File: '/home/vivado/test_board/os/petalinux/components/yocto/layers/core/meta/classes/devicetree.bbclass', lineno: 131, function: devicetree_do_compi
    0127:            if not(os.path.isfile(dtspath)) or not(dts.endswith(".dts") or devicetree_source_is_overlay(dtspath)):
    0128:                continue # skip non-.dts files and non-overlay files
    0129:        except:
    0130:            continue # skip if can't determine if overlay
*** 0131:        devicetree_compile(dtspath, includes, d)
    0134:devicetree_do_install() {
    0135:    for DTB_FILE in `ls *.dtb *.dtbo`; do
File: '/home/vivado/test_board/os/petalinux/components/yocto/layers/core/meta/classes/devicetree.bbclass', lineno: 119, function: devicetree_compile
    0115:        dtcargs += ["-i", i]
    0116:    dtcargs += ["-o", "{0}.{1}".format(dtname, "dtbo" if isoverlay else "dtb")]
    0117:    dtcargs += ["-I", "dts", "-O", "dtb", "{0}.pp".format(dts)]
    0118:    bb.note("Running {0}".format(" ".join(dtcargs)))
*** 0119:, check = True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
    0121:python devicetree_do_compile() {
    0122:    includes = expand_includes("DT_INCLUDE", d)
    0123:    listpath = d.getVar("DT_FILES_PATH")
File: '/home/programs/petalinux/2020.2/components/yocto/buildtools/sysroots/x86_64-petalinux-linux/usr/lib/python3.7/', lineno: 512, function: run
    0508:            raise
    0509:        retcode = process.poll()
    0510:        if check and retcode:
    0511:            raise CalledProcessError(retcode, process.args,
*** 0512:                                     output=stdout, stderr=stderr)
    0513:    return CompletedProcess(process.args, retcode, stdout, stderr)                                                                                               
    0516:def list2cmdline(seq):                                                                                                                                           
Exception: subprocess.CalledProcessError: Command '['dtc', '-@', '-p', '0x1000', '-i', '/home/vivado/test_board/os/petalinux/build/tmp/work/zynq_gene
ric-xilinx-linux-gnueabi/device-tree/xilinx-v2020.2+gitAUTOINC+f725aaecff-r0', '-i', '/home/vivado/test_board/os/petalinux/build/tmp/work-shared/zynq
-generic/kernel-source/arch/arm/boot/dts', '-i', '/home/vivado/test_board/os/petalinux/build/tmp/work-shared/zynq-generic/kernel-source/scripts/dtc/i
nclude-prefixes', '-i', '/home/vivado/test_board/os/petalinux/project-spec/configs/../../components/plnx_workspace/device-tree/device-tree', '-o', 's
ystem-top.dtb', '-I', 'dts', '-O', 'dtb', 'system-top.dts.pp']' returned non-zero exit status 2.                                                                           
Subprocess output:                                                                                                                                                         
/home/vivado/test_board/os/petalinux/project-spec/configs/../../components/plnx_workspace/device-tree/device-tree/zynq-7000.dtsi:551.16-564.5: ERROR
(phandle_references): /amba/ptm@f889d000: Reference to non-existent node or label "cpu1"                                                                                   
ERROR: Input tree has errors, aborting (use -f to force output)                                                                                                           
ERROR: Logfile of failure stored in: /home/vivado/test_board/os/petalinux/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2020.2
ERROR: Task (/home/vivado/test_board/os/petalinux/components/yocto/layers/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/
le) failed with exit code '1'
NOTE: Tasks Summary: Attempted 3447 tasks of which 2692 didn't need to be rerun and 1 failed.

Summary: 1 task failed:
Summary: There was 1 ERROR message shown, returning a non-zero exit code.
ERROR: Failed to build project

How to solve the problem?
Vivado, Vitis, Petalinux - 2020.2. I found the similar eror on xilinx site -, but it is for Versal device.
It was posible to open the old Project with the new Clock Builder (V4.1).
Also it was possible to make changes and programm our te0808-5.

Many Thanks.
Trenz Electronic FPGA Modules / Re: Error on writting to PLL chip on TE0808-5 cause revision
« Last post by JH on November 25, 2021, 02:27:14 PM »
project file is available on the download. --> subfolder StarterKit\misc\SI5345
it was generated with ClockBuilder Pro v2.43 [2020-03-31]
--> when you ask  Sky works, simple ask the last version which supports the B version :-)
it can still happens that newer versions has improvements  for configuration file generation.
Thanks for your answer John.
I will contact Sky works. Do you know on which version do you have built it?
it is possible and there are opensource usb IP available for this, but we strongly recommend not to use the FPGA USB mostly because of USB certification. FPGA IO pin are not fully usb compatible.
Trenz Electronic FPGA Modules / Re: Error on writting to PLL chip on TE0808-5 cause revision
« Last post by JH on November 25, 2021, 08:52:00 AM »
we use FSBL to configure SI5345 temporary over  I2C. There is also code included to write the NVM but we have not tested this yet so it is at your own risk (you need to enable some defines to enable these features).

I didn't checked newest Clock Builder Pro version, but in case it does not longer include revision B, you can also ask SI Lab (now Skyworks) if they have an older version for download avialable which supports this device version.

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