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Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: GlennW on November 20, 2013, 03:51:44 PM

Title: TE720/TE0701 - MIO bank0 use
Post by: GlennW on November 20, 2013, 03:51:44 PM

Can you confirm how the TE0720/TE0701 system uses MIO bank0 pins.
From documentation it seems the default configuration is 2xUART and 1xI2C0 and 2xGPIO. Correct?
UART0 is used as the debug serial port, are any of the other interfaces actually used by the default system?

I would like to reassign some of these pins, will this prevent the system from operating (e.g. does the system/module controller depend on any of them)?

Thanks  :)
Title: Re: TE720/TE0701 - MIO bank0 use
Post by: Oleksandr Kiyenko on November 20, 2013, 04:20:44 PM
Hello,

System controller not depends on this pins.
Minimal configuration is UART0 as debug console.

Best regards
Alex
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