Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: sthibault on April 12, 2021, 04:25:19 PM

Title: Reflashing ZynqBerryZero
Post by: sthibault on April 12, 2021, 04:25:19 PM
I've read all the help on this but I'm still struggling.

I've flashed the device following the instructions in the reference design using the prebuilt binaries.  I.e.:

TE::pr_program_flash -swapp u-boot


That was successful and my system boots to the login prompt.

I then tried to build my own binaries for the same reference design (no changes) and flash the device, but programming fails as others have reported:

TE::pr_program_flash -swapp u-boot
Start Flash Programming
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
INFO: [Labtools 27-2222] Launching hw_server...
INFO: [Labtools 27-2221] Launch Output:

****** Xilinx hw_server v2019.2
  **** Build date : Nov  6 2019 at 22:12:23
    ** Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.


INFO: [Labtools 27-3415] Connecting to cs_server url TCP:localhost:3042
INFO: [Labtools 27-3417] Launching cs_server...
INFO: [Labtools 27-2221] Launch Output:


****** Xilinx cs_server v2019.2.0
  **** Build date : Nov 07 2019-00:28:22
    ** Copyright 2017-2019 Xilinx, Inc. All Rights Reserved.



connect_hw_server: Time (s): cpu = 00:00:00 ; elapsed = 00:00:08 . Memory (MB): peak = 1644.406 ; gain = 0.000
WARNING: [Labtoolstcl 44-128] No matching hw_devices were found.
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/251633005E64A
open_hw_target: Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 2452.680 ; gain = 808.273
INFO: [Labtools 27-2302] Device xc7z010 (JTAG device index = 1) is programmed with a design that has 1 VIO core(s).
INFO: [Labtools 27-1889] Uploading output probe values for VIO core [hw_vio_1]
Test|0||||||
WARNING: [Xicom 50-100] The current boot mode is QSPI.
If flash programming fails, configure device for JTAG boot mode and try again.
Problem in running uboot
Flash programming initialization failed.
ERROR: [Labtools 27-3161] Flash Programming Unsuccessful
ERROR: [TE_PR-108] Script (TE::VLAB::hw_program_flash) failed: ERROR: [Common 17-39] 'program_hw_cfgmem' failed due to earlier errors.


I interrupted the boot process, so the system was at the zynq> prompt when I entered the TE::pr_program_flash command.

I'm using Vivado 2019.2 (reference design requirement).

What do I do to re-program the device?
Title: Re: Reflashing ZynqBerryZero
Post by: JH on April 13, 2021, 07:07:41 AM
Hi,
with 19.2 it depends on flash content how you must reprogram qspi flash.
I add some notes regarding this issues and the usage of different Vivado Versions here:
https://wiki.trenz-electronic.de/pages/viewpage.action?pageId=105689937
Try to program flash manually.

"TE::pr_init_hardware_manager" will set correct flash in Vivado.
Select your Boot.bin and fsbl --> which FSBL depends on the content with 19.2 try out one time the normal one which you has also used in your file.

alternative install Vivado 2017.2 Labtools(Programmer part only), setup flash manually there and programm your Boot.bin --> additional flash for programming is not need on this older version.

second alternative. set boot mode to qspi (short TP13 and TP15 for programming only to switch boot mode from QSPI to JTAG only) --> see schematics page 7

br
John

Title: Re: Reflashing ZynqBerryZero
Post by: sthibault on April 13, 2021, 01:55:20 PM
I've figured this out myself.  I'm not sure why no one has said this.  The solution is simply to add the -def_fsbl option:


TE::pr_program_flash -swapp u-boot -def_fsbl

Title: Re: Reflashing ZynqBerryZero
Post by: JH on April 13, 2021, 02:07:01 PM
Thank you for the hint with the script extension. Is the same as like you use dafault FSBL manually on the GUI.

Sorry I forgot that I add this features to my scripts for newer designs as I wrote you.

I am glad that it works now

br
John