Print Page - TE0715 PUDC_B Initial State on Power On

Title: TE0715 PUDC_B Initial State on Power On
Post by: rouben_s on July 25, 2018, 07:51:48 PM

Hi,

The PUDC_B in the TE0715 module is being controlled by the on-board CPLD. I would like to know the default state for this pin on power on.

Thanks,
Rouben

Title: Re: TE0715 PUDC_B Initial State on Power On
Post by: rouben_s on July 25, 2018, 07:58:41 PM

Found the answer in the wiki:

PUDC

X1 is constant high. Pullups disabled.

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Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: rouben_s on July 25, 2018, 07:51:48 PM