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#41
MAX1000 community projects / Re: SD Ram Controller for MAX1...
Last post by philippe69 - December 27, 2023, 09:24:43 AMI found a solution.
1/ Install the altera_avalon_new_sdram_controller from the 20.1 Quartus
Copy the sdram controller in the quartus folder :
C:\intelFPGA_lite\22.1\ip\altera\sopc_builder_ip\altera_avalon_new_sdram_controller
In bonus, you can get the altera_avalon_new_sdram_controller from the 17.0 Quartus to obtain the sdram list used in the max1000.
Copy TEI0001_sdram_controller.qprs memory in the altera_avalon_new_sdram_controller.qprs file
In the file C:\intelFPGA_lite\22.1\ip\altera_components.ipx add the altera_avalon_new_sdram_controller
<component
name="altera_avalon_new_sdram_controller"
file="sopc_builder_ip/altera_avalon_new_sdram_controller/altera_avalon_new_sdram_controller_hw.tcl"
displayName="SDRAM Controller"
version="20.1"
...
After these operation you will see the SDRAM ip in the QSYS Memory and interface IP Catalog.
2/ Create your design in QSYS
The important thing to know is in the altpll use for the sdram clock MUST have -5000ps of clock phase shift (see the screen capture)
I saw that in the test_board design provides by Trenz :
https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/2.5x6.15/TEI0001/Reference_Design/20.1/test_board/TEI0001-test_board-quartus_20.1.1-20210709113644.zip
3/ Find enclose my simple design that is using :
- A Nios programe to light the 4 first leds. It uses user button
- a sdram use
- a verilog program to light the 4 last led
Philippe69
1/ Install the altera_avalon_new_sdram_controller from the 20.1 Quartus
Copy the sdram controller in the quartus folder :
C:\intelFPGA_lite\22.1\ip\altera\sopc_builder_ip\altera_avalon_new_sdram_controller
In bonus, you can get the altera_avalon_new_sdram_controller from the 17.0 Quartus to obtain the sdram list used in the max1000.
Copy TEI0001_sdram_controller.qprs memory in the altera_avalon_new_sdram_controller.qprs file
In the file C:\intelFPGA_lite\22.1\ip\altera_components.ipx add the altera_avalon_new_sdram_controller
<component
name="altera_avalon_new_sdram_controller"
file="sopc_builder_ip/altera_avalon_new_sdram_controller/altera_avalon_new_sdram_controller_hw.tcl"
displayName="SDRAM Controller"
version="20.1"
...
After these operation you will see the SDRAM ip in the QSYS Memory and interface IP Catalog.
2/ Create your design in QSYS
The important thing to know is in the altpll use for the sdram clock MUST have -5000ps of clock phase shift (see the screen capture)
I saw that in the test_board design provides by Trenz :
https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/2.5x6.15/TEI0001/Reference_Design/20.1/test_board/TEI0001-test_board-quartus_20.1.1-20210709113644.zip
3/ Find enclose my simple design that is using :
- A Nios programe to light the 4 first leds. It uses user button
- a sdram use
- a verilog program to light the 4 last led
Philippe69
#42
UltraScale / Re: Reference Design & Custom ...
Last post by jwil - December 22, 2023, 10:36:52 PMFollowing up, after booting the TEBF80818/TE0818, I was able to generate a configuration for the SI5338 and program over I2C to pass an output clock on J32.
#43
UltraScale / Re: Reference Design & Custom ...
Last post by jwil - December 22, 2023, 05:00:00 PMThank you for the pointers.
One follow-up question on clocks:
If I understand the TEBF0818 / TE0818 reference design correctly, the SI5345 OUT8 differential output is connected to SI5338 IN1/IN2.
Further, the SI5338 CLK1A output is connected to an external SMA connector (J32).
I am trying to program the SI5338 to pass input IN1/IN2 to output CLK1A to verify SI5338 operation.
Is there a default SI5338 configuration included in the reference design?
One follow-up question on clocks:
If I understand the TEBF0818 / TE0818 reference design correctly, the SI5345 OUT8 differential output is connected to SI5338 IN1/IN2.
Further, the SI5338 CLK1A output is connected to an external SMA connector (J32).
I am trying to program the SI5338 to pass input IN1/IN2 to output CLK1A to verify SI5338 operation.
Is there a default SI5338 configuration included in the reference design?
#44
Trenz Electronic FPGA Modules / Re: use prebuilt files
Last post by Lilly_567 - December 21, 2023, 04:36:56 PMHi,
Thanks a lot for your reply. Sadly, it is still not working. I now use the files from the correct folder (sorry for that stupid mistake). I left the JTAG Chain switched to the SoC. The DIP Switches on TE0790-03 are still S1 ON, S2 OFF, S3 OFF and S4 ON. I did not change them since I have the board. I tried using only the hello boot.bin as well as the one with the linux boot (boot.bin, image.ub and boot). However, both seem to not work. LED D2 is not switched of either, so I guess the Linux boot does not work. Putty does open a connection, but nothing arrives. I used Speed 115200 as required in your TRM.
I searched a little bit more online and found this: https://forum.digilent.com/topic/21535-arty-a7-board-vivado-20202-labtools-27-2269-no-devices-detected-on-target-localhost3121/
It looks very similar to my problem. The hardware target is found (with an address that looks ok), but not the device. In the end they found out they have a connectivity problem that is not easy to fix. In another forum (https://support.xilinx.com/s/question/0D52E00006iHlecSAC/vivado-kc705-jtag-no-devices-detected-on-target?language=en_US) they just said that the hardware is damaged. So I was sadly not able to find a solution with the hardware manager as well.
What else could I try? Is there a way to make sure my hardware is ok? I am really sorry that this is such trouble.
Kind regards,
Lilly
Thanks a lot for your reply. Sadly, it is still not working. I now use the files from the correct folder (sorry for that stupid mistake). I left the JTAG Chain switched to the SoC. The DIP Switches on TE0790-03 are still S1 ON, S2 OFF, S3 OFF and S4 ON. I did not change them since I have the board. I tried using only the hello boot.bin as well as the one with the linux boot (boot.bin, image.ub and boot). However, both seem to not work. LED D2 is not switched of either, so I guess the Linux boot does not work. Putty does open a connection, but nothing arrives. I used Speed 115200 as required in your TRM.
I searched a little bit more online and found this: https://forum.digilent.com/topic/21535-arty-a7-board-vivado-20202-labtools-27-2269-no-devices-detected-on-target-localhost3121/
It looks very similar to my problem. The hardware target is found (with an address that looks ok), but not the device. In the end they found out they have a connectivity problem that is not easy to fix. In another forum (https://support.xilinx.com/s/question/0D52E00006iHlecSAC/vivado-kc705-jtag-no-devices-detected-on-target?language=en_US) they just said that the hardware is damaged. So I was sadly not able to find a solution with the hardware manager as well.
What else could I try? Is there a way to make sure my hardware is ok? I am really sorry that this is such trouble.
Kind regards,
Lilly
#45
Trenz Electronic FPGA Modules / Re: use prebuilt files
Last post by JH - December 19, 2023, 09:32:23 PMHi,
TE0715-05-73E33-A is "\test_board\prebuilt\boot_images\04_30_3e_1gb\hello_te0715" see
https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board#TE0715TestBoard-Hardware
Hello TE0715 boot.bin print's only hello TE0715 in endless loop, so image.ub on sd is in this case not needed.
For linux boot you need Boot.bin with u-boot:
\test_board\prebuilt\boot_images\04_30_3e_1gb\u-boot
and in case of 21.2 or newer design also boot.scr file, see: https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board#TE0715TestBoard-Programming
When it boots done LED D2 will go off:
https://wiki.trenz-electronic.de/display/PD/TE0715+TRM#TE0715TRM-MainComponents
When it boots check one time if you see linux console or hello te0715 over uart --> connect uart for example with putty:
https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board#TE0715TestBoard-Usage
And least (it's independent from the other notes above), when you see only Digilent Number on Vivado HW Manager, than you has only a connectÃon from PC to the FTDI of the XMOD. What's the XMOD DIPs?
https://wiki.trenz-electronic.de/display/PD/TE0706+TRM#TE0706TRM-JTAG/UARTInterfaceBase
If you see instead of SoC an unkown device than it's CPLD.
I didn't understand your " I did switch S1-2 (PROGMODE) on, so that the SoC itself is programmed. " this does not mean that SOC program itself, switch JTAG Chain between CPLD and SoC.
br
John
TE0715-05-73E33-A is "\test_board\prebuilt\boot_images\04_30_3e_1gb\hello_te0715" see
https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board#TE0715TestBoard-Hardware
Hello TE0715 boot.bin print's only hello TE0715 in endless loop, so image.ub on sd is in this case not needed.
For linux boot you need Boot.bin with u-boot:
\test_board\prebuilt\boot_images\04_30_3e_1gb\u-boot
and in case of 21.2 or newer design also boot.scr file, see: https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board#TE0715TestBoard-Programming
When it boots done LED D2 will go off:
https://wiki.trenz-electronic.de/display/PD/TE0715+TRM#TE0715TRM-MainComponents
When it boots check one time if you see linux console or hello te0715 over uart --> connect uart for example with putty:
https://wiki.trenz-electronic.de/display/PD/TE0715+Test+Board#TE0715TestBoard-Usage
And least (it's independent from the other notes above), when you see only Digilent Number on Vivado HW Manager, than you has only a connectÃon from PC to the FTDI of the XMOD. What's the XMOD DIPs?
https://wiki.trenz-electronic.de/display/PD/TE0706+TRM#TE0706TRM-JTAG/UARTInterfaceBase
If you see instead of SoC an unkown device than it's CPLD.
I didn't understand your " I did switch S1-2 (PROGMODE) on, so that the SoC itself is programmed. " this does not mean that SOC program itself, switch JTAG Chain between CPLD and SoC.
br
John
#46
Trenz Electronic FPGA Modules / use prebuilt files
Last post by Lilly_567 - December 15, 2023, 04:24:39 PMHi,
I am really sorry about my maybe stupid questions, but I am a beginner. I was given the TE0715-05-73E33-A SoC Module with the TE0706 Carrier Board. Currently, I am trying to get the board to work with the prebuilt files. I did put BOOT.bin from \test_board\prebuilt\boot_images\03_30_3e_1gb\hello_te0715, image.ub from \test_board\prebuilt\os\petalinux\1GB and boot (the EAGLE configuration one) from the same location as the last one one an SD Card. Then I inserted the SD Card into the slot for it. I left the jumpers J10-J13 on their 1.8V position, as even if I would need HR, this also starts at 1.2V. As S1-1 does not change anything, I left it. I did switch S1-2 (PROGMODE) on, so that the SoC itself is programmed. I switched S1-3 (MODE) on in order to use SD-Boot. Furthermore, I switched S1-4 to on as well. Before plugging anything in, I checked my power supply and it was stable 5V. So I plugged in the power connector jack (J1). I connected XMOD JTAG- / UART-header, JX1 using your adapter to my laptop. To open Vivado, I used your vivado_open_existing_project_guimode script. However, I only get the following errors if I try to use the Hardware Manager:
ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Digilent/2516330083A6A.
Check cable connectivity and that the target board is powered up then
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.
ERROR: [Labtoolstcl 44-513] HW Target shutdown. Closing target: localhost:3121/xilinx_tcf/Digilent/2516330083A6A
I have two green and one red LED glowing, so the board seems to work. However, it does not seem to do anything, as none of the LEDs change.
If I try to use the scripts from \test_board\console\base_cmd that actually want to put something on the board, I get the same problem.
What am I doing wrong?
Thank you so much for spending time on this in advance.
Kind regards,
Lilly
I am really sorry about my maybe stupid questions, but I am a beginner. I was given the TE0715-05-73E33-A SoC Module with the TE0706 Carrier Board. Currently, I am trying to get the board to work with the prebuilt files. I did put BOOT.bin from \test_board\prebuilt\boot_images\03_30_3e_1gb\hello_te0715, image.ub from \test_board\prebuilt\os\petalinux\1GB and boot (the EAGLE configuration one) from the same location as the last one one an SD Card. Then I inserted the SD Card into the slot for it. I left the jumpers J10-J13 on their 1.8V position, as even if I would need HR, this also starts at 1.2V. As S1-1 does not change anything, I left it. I did switch S1-2 (PROGMODE) on, so that the SoC itself is programmed. I switched S1-3 (MODE) on in order to use SD-Boot. Furthermore, I switched S1-4 to on as well. Before plugging anything in, I checked my power supply and it was stable 5V. So I plugged in the power connector jack (J1). I connected XMOD JTAG- / UART-header, JX1 using your adapter to my laptop. To open Vivado, I used your vivado_open_existing_project_guimode script. However, I only get the following errors if I try to use the Hardware Manager:
ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Digilent/2516330083A6A.
Check cable connectivity and that the target board is powered up then
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.
ERROR: [Labtoolstcl 44-513] HW Target shutdown. Closing target: localhost:3121/xilinx_tcf/Digilent/2516330083A6A
I have two green and one red LED glowing, so the board seems to work. However, it does not seem to do anything, as none of the LEDs change.
If I try to use the scripts from \test_board\console\base_cmd that actually want to put something on the board, I get the same problem.
What am I doing wrong?
Thank you so much for spending time on this in advance.
Kind regards,
Lilly
#47
UltraScale / Re: TE0807 Starterkit referenc...
Last post by MA - December 12, 2023, 08:59:28 AMHi,
unfortunately I do not have a download link for version 4.3.
What you can do from my point of view is the following:
Please contact the Skyworks support for this version or
read the settings of the clock module from the file "te_Si5345-Register.h". This is a little more complicated but should also work.
best regards,
Manuela
unfortunately I do not have a download link for version 4.3.
What you can do from my point of view is the following:
Please contact the Skyworks support for this version or
read the settings of the clock module from the file "te_Si5345-Register.h". This is a little more complicated but should also work.
best regards,
Manuela
#48
UltraScale / Re: TE0807 Starterkit referenc...
Last post by michielm - December 11, 2023, 03:56:12 PMThanx,
Can you provide me a link to this 4.3 version I cannot find it anywhere on the net...
Gr
Michiel
Can you provide me a link to this 4.3 version I cannot find it anywhere on the net...
Gr
Michiel
#49
UltraScale / Re: TE0807 Starterkit referenc...
Last post by MA - December 11, 2023, 01:53:42 PMThat's right. We need to update the *.slabtimeproj for latest Skyworks versions. The files were created with version 4.3.
#50
CYC1000 community projects / Re: I present a comunity of IN...
Last post by Subcritical - December 10, 2023, 03:10:48 PMHere we can see the USBKeyboard in an 8bit VIC20 implementation:
https://github.com/TheSonders/USBKeyboard
https://www.youtube.com/watch?v=MELJpN_zPD8
https://github.com/TheSonders/USBKeyboard
https://www.youtube.com/watch?v=MELJpN_zPD8