Recent Posts

21

MAX1000 community projects / Re: SD Ram Controller for MAX100

« Last post by Antti Lukats on May 19, 2023, 05:09:13 PM »

are you sure it is also removed from STANDARD version?

22

MAX1000 community projects / Re: LiteX SoC build for MAX1000

« Last post by Antti Lukats on May 19, 2023, 04:57:27 PM »

thanks for this feedback

23

Trenz Electronic FPGA Modules / Re: TE0890 HyperRAM data corruption

« Last post by Antti Lukats on May 15, 2023, 08:26:40 AM »

sorry I stopped the testing. but it did run 3+ weeks without errors!
ok,  I restarted the testing...

24

Trenz Electronic FPGA Modules / Re: TE0890 HyperRAM data corruption

« Last post by lasse@elcon.se on May 15, 2023, 07:22:41 AM »

Is the ip core still running with no failure?

/Lasse

25

MAX1000 community projects / Re: LiteX SoC build for MAX1000

« Last post by BR on May 13, 2023, 06:25:49 PM »

Hi,

Linux Litex SoC build on the MAX1000 10M08SAU169C8G 8k board needs a vexriscv_smp cpu and yields > 8k LUTs. M9K memory is 97%, so it doesn't fit!

So Linux Litex SoC build on a 10M16SAU169C8G should work.
Total logic elements   8,616 / 15,840 ( 54 % )
Total memory bits   295,554 / 562,176 ( 53 % )

Regards,
BR

26

MAX1000 community projects / Re: LiteX SoC build for MAX1000

« Last post by BR on May 12, 2023, 08:58:54 PM »

Hi Antti,

I managed to get Litex SoC running on my MAX1000 8k 8MB RAM board, but only with the minimal RISCV cpu build.

It takes about 6k LUT space and almost all M9K memory. Building the normal RISCV cpu is >9k LUT don't know if the minimal RISCV cpu can run Linux.

Unfortunately I only own two MAX10 8k 8MB boards so maybe i need to get a 16k with 32MB RAM to get this running?

Thanks!

Regards,
BR

27

Trenz Electronic FPGA Modules / Re: Setting TE0715 in JTAG mode to program QSPI FLASH

« Last post by benwefers on May 12, 2023, 01:01:27 AM »

Hi John!

I went ahead and sent an email. Perhaps we can continue this off the forum.

Thanks for the quick reply,

Ben

28

Trenz Electronic FPGA Modules / Re: Setting TE0715 in JTAG mode to program QSPI FLASH

« Last post by JH on May 11, 2023, 07:56:15 AM »

Hi,
how did you connect these controller signals?
https://wiki.trenz-electronic.de/display/PD/4+x+5+SoM+Integration+Guide#id-4x5SoMIntegrationGuide-4x5ModuleControllerIOs
can you share the schematics of your carrier? You can also send them as PDF to support@trenz-electronic.de.
br
John

29

Trenz Electronic FPGA Modules / Re: Setting TE0715 in JTAG mode to program QSPI FLASH

« Last post by benwefers on May 10, 2023, 06:40:42 PM »

I'd also like to jump into this thread. I recently wrapped up a project using a TE0715-05 and a custom carrier board where everything was handled in QSPI (no SD card was present). I am now working on getting the same functionality for a few TE0715-04 boards I have, but am struggling to get them to do anything. I followed the same steps for the 04 as I did with the 05, and it says they are being programmed successfully, but the boards do not boot, and there isn't even a boot menu I can get into on startup.

Is there a pin I should be setting or any ideas?

Thanks

30

Trenz Electronic FPGA Modules / Re: GbE PHY on TE0706

« Last post by JH on May 09, 2023, 07:55:50 AM »

Hi,
I am glad to hear that it now works for you, and thank you for sharing your solution here.
br
John