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#1
Trenz Electronic FPGA Modules / Re: JTAG connection error on J...
Last post by Loketci - February 08, 2025, 03:30:01 PMHello again,
Thanks for your solution but it's not worked. I updated my TE0701-6 carrier board CPLD firmware to REV06 version. Somethings changed () but problem doesn't solved. I cannot connect JTAG access.
Also What do you mean newer TE0820 modules?
My module TE0820-05 version. Is that newer or not?
Also If that is not newer version Can I connect jtag mode if I insert the module TE0821-01 ?
Could I anyway connect chance with TE0701-6 module on TE0820-5 or TE0821-1 ? Is that Yes or not. If yes How?
Thanks for your solution but it's not worked. I updated my TE0701-6 carrier board CPLD firmware to REV06 version. Somethings changed () but problem doesn't solved. I cannot connect JTAG access.
Also What do you mean newer TE0820 modules?
My module TE0820-05 version. Is that newer or not?
Also If that is not newer version Can I connect jtag mode if I insert the module TE0821-01 ?
Could I anyway connect chance with TE0701-6 module on TE0820-5 or TE0821-1 ? Is that Yes or not. If yes How?
#2
Trenz Electronic FPGA Modules / Re: JTAG connection error on J...
Last post by JH - February 07, 2025, 11:34:56 AMHi,
J15 itself is for ARM JTAG debugger, not standard Xilinx JTAG.
JTAG is available over build in programmer of the TE0701 carrier.
It's the mini usb connector J7 (Point 8 on the picture):
https://wiki.trenz-electronic.de/display/PD/TE0701+TRM#TE0701TRM-MainComponents
So you need only connect this with your PC and open Vivado HW Manager an connect and you should see SoC.
With older CPLD Firmware you can switch only between QSPI und SD Boot Mode(this will be done when you insert a SD Card), JTAG only Boot Mode is not selectable. JTAG only boot mode does means, that system doesn't try to boot. It waits only for commands over JTAG. JTAG itself is available.
There is a new CPLD Firmware available where you can set Boot Mode also to JTAG only for newer TE0820 modules. Update TE0701 CPLD instructions:
https://wiki.trenz-electronic.de/display/PD/TE0701+CPLD+Firmware
The easiest way to bring up system is boot from SD, we offer also some reference designs with prebuilt binaries for test:
https://wiki.trenz-electronic.de/display/PD/TE0820+Test+Board
br
John
J15 itself is for ARM JTAG debugger, not standard Xilinx JTAG.
JTAG is available over build in programmer of the TE0701 carrier.
It's the mini usb connector J7 (Point 8 on the picture):
https://wiki.trenz-electronic.de/display/PD/TE0701+TRM#TE0701TRM-MainComponents
So you need only connect this with your PC and open Vivado HW Manager an connect and you should see SoC.
With older CPLD Firmware you can switch only between QSPI und SD Boot Mode(this will be done when you insert a SD Card), JTAG only Boot Mode is not selectable. JTAG only boot mode does means, that system doesn't try to boot. It waits only for commands over JTAG. JTAG itself is available.
There is a new CPLD Firmware available where you can set Boot Mode also to JTAG only for newer TE0820 modules. Update TE0701 CPLD instructions:
https://wiki.trenz-electronic.de/display/PD/TE0701+CPLD+Firmware
The easiest way to bring up system is boot from SD, we offer also some reference designs with prebuilt binaries for test:
https://wiki.trenz-electronic.de/display/PD/TE0820+Test+Board
br
John
#3
Trenz Electronic FPGA Modules / JTAG connection error on J15 c...
Last post by Loketci - February 07, 2025, 06:18:59 AMHi
I try to use JTAG mode on TE0820 with xilinx Platform cable USB II(over J15 connector). But I couldn't connect. When I looked J15 connector pins, they directly goes to (x0..5) Te0820-5 Bank66 pins(They must be << 1.8V But When you on S4- 1,2,3 I t directly send these pins 3.3V and burn this bank or more.) over JM1 connector.
Is there anyway that I can Correct my TE0820-5 module alive? And I read forums there are different kind versions and problems. Is my TE0820-5 CPLD version correct? Is it need any cpld firmware update?.
(TE0701-6)To solve this problem, I remove R20 and R21 and solder with cable J15 pins directly to U4,6,7,8 (Which I removed them too). But again it didn't work My platform cable doesn't detect anything. (it works I confirmed that)
Digging more.. I saw a problem too. But I cannot solve First and other days problem which Pulling down 0 pgood and mode pin for enabling jtag. When I use Switches, It doesn't change anything. (I read forums and it says it will be fixed Rev07 )
But now how I can confirm that my Te08-20 working and enabling jtag?
I try to use JTAG mode on TE0820 with xilinx Platform cable USB II(over J15 connector). But I couldn't connect. When I looked J15 connector pins, they directly goes to (x0..5) Te0820-5 Bank66 pins(They must be << 1.8V But When you on S4- 1,2,3 I t directly send these pins 3.3V and burn this bank or more.) over JM1 connector.
Is there anyway that I can Correct my TE0820-5 module alive? And I read forums there are different kind versions and problems. Is my TE0820-5 CPLD version correct? Is it need any cpld firmware update?.
(TE0701-6)To solve this problem, I remove R20 and R21 and solder with cable J15 pins directly to U4,6,7,8 (Which I removed them too). But again it didn't work My platform cable doesn't detect anything. (it works I confirmed that)
Digging more.. I saw a problem too. But I cannot solve First and other days problem which Pulling down 0 pgood and mode pin for enabling jtag. When I use Switches, It doesn't change anything. (I read forums and it says it will be fixed Rev07 )
But now how I can confirm that my Te08-20 working and enabling jtag?
#4
Trenz Electronic FPGA Modules / Quad SPI FLASH on te0711
Last post by GD26 - February 06, 2025, 11:45:34 AMHello,
I am using a TE0711 board.
For my application, I would like to use a section of the S25FL256 memory to store a few bytes.
Is there any example code available for reading and writing to a defined area of the memory?
Thanks a lot.
GD
I am using a TE0711 board.
For my application, I would like to use a section of the S25FL256 memory to store a few bytes.
Is there any example code available for reading and writing to a defined area of the memory?
Thanks a lot.
GD
#5
Trenz Electronic FPGA Modules / Re: TEB0911 Reference design g...
Last post by Stonebull - February 04, 2025, 12:44:53 PMThanks for your reply, that was probably the issue.
#6
Trenz Electronic FPGA Modules / Re: TEB0911 Reference design g...
Last post by JH - February 03, 2025, 09:48:14 AMHi,
you need to install Ultrascale+ devices. Please take also into account, that ZU9 devices is not included into the free Standard Edition. You need the Enterprise Edition:
https://docs.amd.com/r/en-US/ug973-vivado-release-notes-install-license/Supported-Devices
br
John
you need to install Ultrascale+ devices. Please take also into account, that ZU9 devices is not included into the free Standard Edition. You need the Enterprise Edition:
https://docs.amd.com/r/en-US/ug973-vivado-release-notes-install-license/Supported-Devices
br
John
#7
Trenz Electronic FPGA Modules / I need help for Zynq and FPGA ...
Last post by charlesallen - January 24, 2025, 02:28:57 PMHi everyone,
I am a beginner in the FPGA space & got my hands on the Trenz TE0720 board. Also I have managed to power it up and browse through the documentation but I am not sure about the best way to move forward with my first project.
I want to know about how Python could fit into the workflow. I came across some mentions of the features of Python being helpful for scripting and automation in FPGA projects. Is this something I should look into as a beginner or should I focus on other tools first?
Any beginner-friendly resources for getting started with Vivado?
Are there reference designs available for the TE0720 that I can use as examples?
Should I set up the Zynq processor for Linux or start with bare-metal programming?
Thank you.
I am a beginner in the FPGA space & got my hands on the Trenz TE0720 board. Also I have managed to power it up and browse through the documentation but I am not sure about the best way to move forward with my first project.
I want to know about how Python could fit into the workflow. I came across some mentions of the features of Python being helpful for scripting and automation in FPGA projects. Is this something I should look into as a beginner or should I focus on other tools first?
Any beginner-friendly resources for getting started with Vivado?
Are there reference designs available for the TE0720 that I can use as examples?
Should I set up the Zynq processor for Linux or start with bare-metal programming?
Thank you.
#8
Trenz Electronic FPGA Modules / TEB0911 Reference design gener...
Last post by Stonebull - January 21, 2025, 03:05:01 PMDear Trenz support team,
I'm trying to get the reference design 2019.2 for the TEB0911 to generate, using the script "_create_win_setup.cmd".
Although unfortunately, after the step of selecting the correct module (TEB0911-04-9BEX1MA) - the script aborts with the following error message:
ERROR: [TE_INIT-145] Script (TE::VIV::create_project) failed: ERROR: [Common 17-69] Command failed: Part 'xczu9eg-ffvb1156-1-e' not found
Also, I verified that indeed the board_files folder contains only two boards:
However, when trying to select a different module with matching name to the available board files, the script still failed with the same error message.
Can you please give me support on how to get started with the reference design for the TEB0911?
Best Regards
I'm trying to get the reference design 2019.2 for the TEB0911 to generate, using the script "_create_win_setup.cmd".
Although unfortunately, after the step of selecting the correct module (TEB0911-04-9BEX1MA) - the script aborts with the following error message:
ERROR: [TE_INIT-145] Script (TE::VIV::create_project) failed: ERROR: [Common 17-69] Command failed: Part 'xczu9eg-ffvb1156-1-e' not found
Also, I verified that indeed the board_files folder contains only two boards:
- TEB0911_9EG_1E
- TEB0911_15EG_1E
However, when trying to select a different module with matching name to the available board files, the script still failed with the same error message.
Can you please give me support on how to get started with the reference design for the TEB0911?
Best Regards
#9
Trenz Electronic FPGA Modules / How to setup CAN interface on ...
Last post by Bugtech - January 16, 2025, 04:38:25 PMI am working on TE0818 board. I want to use CAN interface to send and receive data, Is there any guide or tutorial to setup this connection?
Are there any drivers needed to be installed separately? (CAN4Linux or SocketCAN)
I have petalinux 2022.2 in my board.
Are there any drivers needed to be installed separately? (CAN4Linux or SocketCAN)
I have petalinux 2022.2 in my board.
#10
Trenz Electronic FPGA Modules / Re: TEC0330: CVS List of SODIM...
Last post by JH - January 16, 2025, 10:07:13 AMHi,
you can download our 2021.2 reference design:
https://wiki.trenz-electronic.de/display/PD/TEC0330+Test+Board
https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/PCIe_Cards/TEC0330/Reference_Design/2021.2/test_board
Pin coordinates are included into the mig project file:
test_board\board_files\TEC0330\1.0\mig.prj
br
John
you can download our 2021.2 reference design:
https://wiki.trenz-electronic.de/display/PD/TEC0330+Test+Board
https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/PCIe_Cards/TEC0330/Reference_Design/2021.2/test_board
Pin coordinates are included into the mig project file:
test_board\board_files\TEC0330\1.0\mig.prj
br
John