Trenz Electronic Products > Trenz Electronic FPGA Modules

Boot issue with VxWorks on TE0715/TE0701

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JH:
Hi,
device tree depends on the activated interface in the Vivado Zynq IP. The exported HDF  of this vivado project is use this configuration to generate FSBL and linux.

If you use definition from other configuration, it can happens everything. Maybe your other eval board has similar configuration like ZC702. Did you select correct DDR size in your device tree?

The parts we have changed manually in the device tree are explained here:
https://wiki.trenz-electronic.de/display/PD/TE0720+Test+Board#TE0720TestBoard-SoftwareDesign-PetaLinux

dtb can be converted back into readable format

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842279/Build+Device+Tree+Blob

Our complete device tree is include in the image.ub. I think you could extract but I never test it. Maybe a easer way is to generate one time the petalinux project with our petalinux template and the provide HDF for your assembly variant. The generated dtb is included in the image folder of the generate petalinux project and you can convert back to dts.

br
John

Chris12:
Hi John,
The issue is now solved.
I was looking in the wrong direction: the kernel is working fine, but I couldn't get any log due to incorrect uart configuration.
Without any log output, I focused my research on a boot issue instead of comm issue.
Thanks for your support!

JH:
Hi,
thanks for feedback and good to hear that it works.

br
John

dswiger22:
Sorry to post 2 years later, but I'm having a similar problem as Chris12... I hope you're still around to provide more details.  To summarize my problem, I've got a "known working Trenz board" (TE0706-03 baseboard and TE0715 module) that we've been booting Linux on for several years.  I'm trying to do a VxWorks build with the latest VxWorks tools (VxWorks 7, version 21.11) and am having no luck getting anything out of the console after U-Boot identifies the VxWorks kernel and DTB.  In my past experience (with VxWorks running on other processors), I usually see a large list of initializations ending with the VxWorks ASCII-Art logo, and a '->' prompt.  However, here's all I get with the current setup (the files are read from SD card to memory, then a "bootm" command, pointing at the two memory areas):

--- Code: ---Zynq> boot
reading uVxWorks
12420356 bytes read in 657 ms (18 MiB/s)
reading zynq-zc706.dtb
4930 bytes read in 16 ms (300.8 KiB/s)
## Booting kernel from Legacy Image at 00300000 ...
   Image Name:   vxworks
   Image Type:   ARM VxWorks Kernel Image (uncompressed)
   Data Size:    12420292 Bytes = 11.8 MiB
   Load Address: 00200000
   Entry Point:  00200000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 00100000
   Booting using the fdt blob at 0x100000
   Loading Kernel Image ... OK
   Loading Device Tree to 1f314000, end 1f318341 ... OK
## Starting vxWorks at 0x00200000, device tree at 0x1f314000 ...
<nothing more>
--- End code ---

If you're still around Chris12 and can share what your boot log looked like after you fixed the UART issue, that might be very helpful.  Also a clue as to what you changed your UART configuration to might be helpful.

For our problem, I've tried several modifications of the WindRiver provided DTS files to no avail (note above I used a zynq-zc706.dts file, but I also tried zynq-zc702.dts).  I've also tried to  use the exact same DTS files we're currently using for our Linux build.  While VxWorks tools complain a little (provide tool warnings about the DTS files) they don't indicate that the image should not run.  I feel like this is a UART configuration issue, but haven't landed on the change to make yet.

Thanks for any help!

JH:
Hi,
I think you must use the the device tree which describes your TE0715 setup. Otherwhise you has annother HW description. Zynq is a configurable system. Each changes on PS or PS-PL (AXI Addresses or CLKs) need mostly other devicetree or some changes on it.
Start for example with our reference design and generate petalinux with our template.
br
John

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