Print Page - TE0808 - SFP configuration and PLL RST with CPLD

Title: TE0808 - SFP configuration and PLL RST with CPLD
Post by: baldrism on June 18, 2019, 01:20:29 PM

Hello all,

I am working with the board TE0808 with the SOM Zynq-UltraScale U9EG-1EE. I want to ensure that the PLL_RST is set to '1' and also that the SFP1_TX_DIS is set to 0.
As I have seen in the schematic both signals goes to the CPLD chip. My question is how can I set this values and how can I read them. Is there any design flow for this kind of thing?

Thanks and best regards,

baldrism

Title: Re: TE0808 - SFP configuration and PLL RST with CPLD
Post by: JH on June 18, 2019, 02:45:49 PM

Hi,
TE0808 has no CPLD. So you mean TEBF0808...
TEBF0808 CPLD Description of the newest CPLD Firmware:

https://wiki.trenz-electronic.de/display/PD/TEBF0808+CPLD (https://wiki.trenz-electronic.de/display/PD/TEBF0808+CPLD)

Maybe you must do firmwareupdate, basic isntructions:

https://wiki.trenz-electronic.de/display/PD/TEBF0808+CPLD+Firmware

Prebuilt Firmware and CPLD source code is available on the download area of the carrier.brJohn

Trenz Electronic GmbH Support Forum

Trenz Electronic Products => UltraScale => Topic started by: baldrism on June 18, 2019, 01:20:29 PM