News:

Attention: For security reasons,please choose a user name *different* from your login name.
Also make sure to choose a secure password and change it regularly.

Main Menu

Recent posts

#11
Trenz Electronic FPGA Modules / Si5338 TE0713
Last post by ame - March 04, 2024, 02:07:37 PM
Hello,

I'm trying to configure SI5338. I getback the TE0712 ClockBuilder project, but it looks the schematic changed. The termination resistor R49 has been add on clk3 (200MHZ) and remove on CLK (125MHz).
Should I change the format output on clock builder pro?
Could you provide your clock-builder reference project?

I'm using Vhdl project https://github.com/steffenmauch/SI5338-VHDL but I obtain 87.63MHz instead of 100MHz.

Regards
#12
MAX1000 community projects / Playing ZX Spectrum in HDMI in...
Last post by Subcritical - February 22, 2024, 05:52:24 AM
#13
Trenz Electronic FPGA Modules / ZX Spetrum in MAX1000
Last post by Subcritical - February 22, 2024, 05:46:02 AM
#14
Trenz Electronic FPGA Modules / Re: TE0712 oscillators drift
Last post by ame - February 21, 2024, 08:35:15 AM
Quote from: JS on December 06, 2022, 06:12:38 PMAny news about that issue?
I just switch to a pcie root-point without ssc. The drift was from the ssc root point.

Regards
#15
Trenz Electronic FPGA Modules / Re: Flash QSPI TE0820 with 202...
Last post by JH - February 14, 2024, 09:12:18 AM
Hi,
different can be QSPI is with our without design...or like I say some other issue.
Try to change boot mode to JTAG only, if it works, than it's problem with AMD software only.

Let me know if you need help again.
br
John
#16
Trenz Electronic FPGA Modules / Re: Flash QSPI TE0820 with 202...
Last post by Adrien - February 12, 2024, 03:42:56 PM
I happened to have other products from Trenz. I just tried with TE0820-05-4AE81MA REV5 and a carrier TE0703-05 this time and it works, first try. I am still using Xilinx 2022.2 tools on Windows 10 and the switch on the carrier is configured the same. I just did the same, launch _create_win_setup.cmd, create binaries, create zynqmp_fsbl (TE modified) with sw_libs/ and prebuilt .xsa file. I just don't know. If I have time I will test on the previous setup.
#17
Trenz Electronic FPGA Modules / Re: Flash QSPI TE0820 with 202...
Last post by JH - February 12, 2024, 08:00:49 AM
Hi,
here are some information about this topic:
https://wiki.trenz-electronic.de/pages/viewpage.action?pageId=105689937

At the end you should change boot mode to JTAG for flash programming, if you want to use newer Vivado version.Workaround with special FSBL seems to work less and less with each newer Version...

So simple install oder Vivado Labtools version (best was 17.2 as long as it now the device and the flash) and try again.
Or change boot mode to JTAG (there are different ways possible, depending on your carrier and CPLD Firmware). ways depends on CPLD Firmware, see CPLD Firmwar update and Variants:
https://wiki.trenz-electronic.de/display/PD/TE0820+CPLD+Firmware

Of course, it is also possible that the FSBL has a problem and simply crashes (FSBL does not match variant or module defective or simply a power problem). But I can't say that with your information yet. You could first boot from the SD card and see if that works.

br
John
#18
Trenz Electronic FPGA Modules / Flash QSPI TE0820 with 2022.2 ...
Last post by Adrien - February 09, 2024, 04:41:23 PM
I am trying to flash the QSPI of a TE0820-04-4DE21FA with a carrier board TE0703-06 with 2022.2 Xilinx tools.
So I did _create_win_setup.cmd, generate binaries and tried to flash _binaries_TE0820-04-4DE21FA\boot_linux with _binaries_TE0820-04-4DE21FA\res_elf\fsbl.elf or SDMODE\fsbl_flash.elf with the command `C:\Xilinx\Vitis\2023.2\bin\program_flash -f BOOT.bin -fsbl fsbl_flash.elf -flash_type qspi-x8-dual_parallel -url tcp:localhost:3121` with the Switch S2-1 & S2-2 & S2-3 On and S2-4 Off but nothing works and I have the following:
>> ===== mrd->addr=0xFF5E0204, data=0x00000222 =====
>> BOOT_MODE REG = 0x0222
>> WARNING: [Xicom 50-100] The current boot mode is QSPI32.
>> Flash programming is not supported with the selected boot mode.If flash programming fails, configure device for JTAG boot mode and try again.
>> Downloading FSBL...
>> Running FSBL...
>> ===== mrd->addr=0xFFD80044, data=0x00000000 =====
>> ===== mrd->addr=0xFFD80044, data=0x00000000 =====
>> ...
>> ERROR: [Xicom 50-331] Timed out while waiting for FSBL to complete.
>> Problem in Initializing Hardware
>> Flash programming initialization failed.

I know about using the fsbl_flash to get around this QSPI mode to use JTAG instead but I just don't get how I am supposed to find/create/use it.
There is no zynqmp_fsbl_flash in sw_libs/sw_app/ in zip 2022.2. I tried to generate zynqmp_fsbl with prebuilt 4ev_1e_2gb, use a fsbl_flash from previous version...
#19
Trenz Electronic FPGA Modules / Re: use prebuilt files
Last post by Lilly_567 - January 30, 2024, 12:39:04 PM
Hi,

thank you a lot for your help. The problem was the inverted switch.
I am sorry it took so long for me to reply.

Again, thank you so much. I am so happy that I can finally start to work.

Kind regards,
Lilly
#20
UltraScale / Re: TE0808/TE0803 Linux - Unab...
Last post by logmaster - January 26, 2024, 01:13:02 PM
Hi everyone,

I found a working solution here:

https://support.xilinx.com/s/question/0D54U00005wQoYhSAK/have-error-with-cat-prociomem-in-linux-board-zynqmp?language=en_US

Basically, this error appears when the PS is configured with 64bit DRAM bus. Setting it to 32bit resolved the issue.

Is there an explanation why this happens? Is it a known problem?

Thank you!