I see in TEBF0808 TRM if the DIP switch S5-1 and 2 are set to ON, the system can boot from SPI Flash if no SD is detected.
I have a TEBF0808 starter kit and have not changed anything on it yet. I removed the SD card purposely to make it boot from SPI flash, but I don't see anything showing to the debug port. Does the start kit come with this feature?
Do I need to reconfigure anything to make it boot from flash?
Thanks.
Thanks, John. I found out that the flash is not programmed by default. After I wrote image to the flash, it was able to boot from flash on the starter kit.
The problem is now when I move the same SoM to our own custom board, it cannot boot. Nothing happens. The ERR_OUT pin out is high. We dumped the register values as shown below. it looks the boot mode setting and power were good, but failed to read from flash. I don't know what else I could be missing. I have attached my schematic here. Thanks in advance.
== Registers Dump
BOOT_MODE_USER = FF5E0200: 00000002
BOOT_MODE_POR = FF5E0204: 00000222
RESET_REASON = FF5E0220: 00000021
PMU_GLOBAL.PWR_STATE = FFD80100: 00FFFCBF
PWR_SUPPLY_STATUS = FFD8010C: 00000007
CSU_BR_ERROR = FFD80528: 80002400
ERROR_STATUS_1 = FFD80530: 00000000
ERROR_STATUS_2 = FFD80540: 04000000
csu_status = FFCA0000: 00000000
csu_ft_status = FFCA0018: 00000000
CSU_ISR = FFCA0020: 00008024
pcap_status = FFCA3010: 00000A02
tamper_status = FFCA5000: 00000000
jtag_chain_status = FFCA0034: 00000003
jtag_sec = FFCA0038: 000001FF
1 PS TAP
2 PMU
13* MicroBlaze PMU (Running)
3 PL
4 PSU
5 RPU (Reset)
6 Cortex-R5 #0 (RPU Reset)
7 Cortex-R5 #1 (RPU Reset)
8 APU (L2 Cache Reset)
9 Cortex-A53 #0 (APU Reset)
10 Cortex-A53 #1 (APU Reset)
11 Cortex-A53 #2 (APU Reset)
12 Cortex-A53 #3 (APU Reset)
CONFIG STATUS: 0
CRC ERROR (Bits
- ): 0
DECRYPTOR ENABLE (Bits [1]): 0
PLL LOCK STATUS (Bits [2]): 0
DCI MATCH STATUS (Bits [3]): 0
END OF STARTUP (EOS) STATUS (Bits [4]): 0
GTS_CFG_B STATUS (Bits [5]): 0
GWE STATUS (Bits [6]): 0
GHIGH STATUS (Bits [7]): 0
MODE PIN M[0] (Bits [8]): 0
MODE PIN M[1] (Bits [9]): 0
MODE PIN M[2] (Bits [10]): 0
INIT_B INTERNAL SIGNAL STATUS (Bits [11]): 0
INIT_B PIN (Bits [12]): 0
DONE INTERNAL SIGNAL STATUS (Bits [13]): 0
DONE PIN (Bits [14]): 0
IDCODE ERROR (Bits [15]): 0
SECURITY ERROR (Bits [16]): 0
SYSTEM MONITOR OVER-TEMP ALARM STATUS (Bits [17]): 0
CFG STARTUP STATE MACHINE PHASE (Bits [20:18]): 0
SECURITY_STATUS (Bits [23:21]): 0
RESERVED (Bits [24]): 0
CFG BUS WIDTH DETECTION (Bits [26:25]): 0
SECURITY AUTH ERROR (Bits [27]): 0
PUDC_B PIN (Bits [28]): 0
BAD PACKET ERROR (Bits [29]): 0
CFGBVS PIN (Bits [30]): 0
RESERVED (Bits [31]): 0