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1
UltraScale / Re: TEBF0808 - USB3.0 not working
« Last post by JH on April 28, 2017, 12:16:58 PM »
Hi,

use petalinux 2016.4. It's jocto based build process with SDK/HSI in the background (it use also a distribution from xilinx git hub), see also:

You can use the petalinux template from our reference design with your hdf. See our KickStart description.

br
John
2
UltraScale / Re: TEBF0808 - USB3.0 not working
« Last post by Matt on April 28, 2017, 12:09:54 PM »
Hi John,

Thank you for the quick answer and sorry for the duplicate.

I am now using the 2016.4 environment (Linux kernel and U-Boot) and I generated a FSBL with the XSDK 2016.4.
Unfortunately I have a problem when building the ATF (source code from "https://github.com/Xilinx/arm-trusted-firmware.git", tag "xilinx-v2016.4"). The compilation command I use is the following:
Code: [Select]
# make CROSS_COMPILE=/path/to/cross/compile PLAT=zynqmp RESET_TO_BL31=1
And I get this error
Code: [Select]
bl31/aarch64/runtime_exceptions.S: Assembler messages:
bl31/aarch64/runtime_exceptions.S:177: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:186: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:191: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:196: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:212: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:216: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:220: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:224: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:240: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:249: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:253: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:257: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:273: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:282: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:286: Error: non-constant expression in ".if" statement
bl31/aarch64/runtime_exceptions.S:290: Error: non-constant expression in ".if" statement

Is there a workaround?

Thank you for the support
3
UltraScale / Re: TEBF0808 - USB3.0 not working
« Last post by JH on April 28, 2017, 09:54:20 AM »
Hi,

this will be detect automatically, if everything (PS Settings, USB3.0-GTREF-CLK,Linux Driver...) is Ok. Do you use our board parts and modified FSBL? For UlraScale+ devices it will be better to change to the newer Vivado/Linux version. And do not mix files from different versions. Xilinx change and fix a lot of things with every iteration for the beta devices.   

We provide a reference design with USB3.0 activated for storage devices for Vivado 2016.4 / PetaLinux 2016.4:
It includes source code, board part files, fsbl template for SI5345 initialization, petalinux template with current settings, prebuilt...
Links how to use the sources are here:
 

Here's a log with USB3.0 storage on TEBF0808 StarterKit with mini ITX enclosure:
Code: [Select]
root@plnx_aarch64:~# lsusb
Bus 001 Device 002: ID 04b4:650a
Bus 002 Device 002: ID 04b4:6508
Bus 001 Device 001: ID 1d6b:0002
Bus 002 Device 001: ID 1d6b:0003
root@plnx_aarch64:~# [   40.125480] usb 2-1.4: new SuperSpeed USB device number 3 using xhci-hcd
[   40.150991] usb 2-1.4: New USB device found, idVendor=125f, idProduct=312b
[   40.157860] usb 2-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[   40.165228] usb 2-1.4: Product: ADATA USB Flash Drive
[   40.170307] usb 2-1.4: Manufacturer: ADATA
[   40.174431] usb 2-1.4: SerialNumber: 273021046016003D
[   40.180791] usb-storage 2-1.4:1.0: USB Mass Storage device detected
[   40.187422] scsi host2: usb-storage 2-1.4:1.0
[   41.370549] scsi 2:0:0:0: Direct-Access     ADATA    USB Flash Drive  1100 PQ: 0 ANSI: 6
[   41.379840] sd 2:0:0:0: [sda] 30310400 512-byte logical blocks: (15.5 GB/14.5 GiB)
[   41.388070] sd 2:0:0:0: [sda] Write Protect is off
[   41.393456] sd 2:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[   41.409192]  sda: sda1
[   41.415603] sd 2:0:0:0: [sda] Attached SCSI removable disk

root@plnx_aarch64:~# lsusb
Bus 001 Device 002: ID 04b4:650a
Bus 002 Device 002: ID 04b4:6508
Bus 001 Device 001: ID 1d6b:0002
Bus 002 Device 001: ID 1d6b:0003
Bus 002 Device 003: ID 125f:312b

P.S: It's enough to write a request either to the forum or to our support. Both to the same time is not necessary.

br
John
4
UltraScale / TEBF0808 - USB3.0 not working
« Last post by Matt on April 27, 2017, 03:09:45 PM »
Hi,

I am working with the UltraSOM+ device Rev03 (TE0808) and the motherboard TEBF0808. I built a Linux system with the help of Buildroot, using the components (Linux kernel, U-Boot, etc. [version 2016.2]) from the official Xilinx Github repository.

Concerning my problem:
the board has two USB 2.0/3.0 ports, which are seen by the Linux kernel without a problem.
# lsusb
Bus 002 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 001 Device 002: ID 04b4:650a Cypress Semiconductor Corp.
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub


The USB driver for USB2.0 and USB3.0 are installed into the kernel.
As illustrated above, the device 002 (I think it represents the two USB ports) is connected to the Bus 001, which is a USB2.0 bus. As a consequence, all USB device that I connect to the board are directly connected to the Bus 001 (USB2.0).

How can I connect the USB3.0 device to the Bus 002?

Thanks,

Matteo
5
Trenz Electronic FPGA Modules / Re: TE060 Ethernet with External RAM
« Last post by Oleksandr Kiyenko on April 27, 2017, 12:17:35 PM »
Hi

XPS project will take less time to implement, because all blocks is already tested. With ISE project you will need some ethernet processing anyway, but also need to implement/debug interface to MIG.

Best regards
Oleksandr Kiyenko
6
Ok,
I will check and let you know if i find out something.
br
John
7
Hi John,

I have sent screenshots of our custom carrier board schematic to the email address you specified. It would be great if you could check them and let me know if you find any obvious mistakes/issues.

Regards,
Raju 
8
Trenz Electronic FPGA Modules / TE060 Ethernet with External RAM
« Last post by sab123 on April 27, 2017, 10:02:11 AM »
Hi,

I want to stream data from Ethernet to the two external RAMS that come with TE0600. I have two approaches in mind.

1. See the example reference design on XPS and make a small system with Processor, RAM, Ethernet and AXI bus.

2. On ISE, I can connect the VHDL Code that comes with MIG and an Ethernet Code(that I have already developed).

Which one of the two approaches is *easier* to implement. And how much is the difference in expertise/time required between these 2 approaches.

Best Regards,

9
Hello,

You just need to generate hdl wrapper for your blockdesign, then open this wrapper in editor to see exact pin names.
Create/edit constraints file. In this file you should specify GPIO pins you select with RGMII/MDIO signals on wrapper top level.

Best regards
Oleksandr Kiyenko
10
Trenz Electronic FPGA Modules / Re: ZynqBerry TE026 Ethernet implementation
« Last post by mugurumov on April 26, 2017, 05:03:50 PM »
I've started implementing it.

So as you have pointed out, I have been digging a bit into the free pins of the Zynqberry. I understand that the internal traces I have to use are the EMIOs connected to the bank34 you've mentioned (the actual physical pins that makes connection with the GPIO header).

So I have configured out the Zynqberry to have Enet0 into EMIOs. I have also clikced on MDIO an also assigned to EMIO. This way I cant route those pins to the GPIO header pins.

Now I have placed a MII to RGMII IP core and also a SelectIO Wizard to convert MDIO 3x signals I,O & T into a IO MDIO signal. To do so I have followed the next docs:

+ https://www.xilinx.com/support/documentation/ip_documentation/gmii_to_rgmii/v4_0/pg160-gmii-to-rgmii.pdf

-> Specially helpful the picture of page 16, Figure 2-7

+ https://forums.xilinx.com/t5/General-Technical-Discussion/MDIO-connection-between-MAC-and-Internal-PHY-Ethernet-1000base-X/td-p/492758

 and here this image:


So I have ended up with this connections at the PL (see attached picture in case is not available):



Now, I would like to attach the RGMII and data_to_and_from_pins to the Zynq pins.
As far I understand, to do so I need to use the constraints, any guidance of how to do so?

EDIT

I would like to attach a device like this:

+ http://www.ti.com/tool/dp83867ergz-r-evm
+ http://www.ti.com/lit/df/snlr034/snlr034.pdf -> SCH

Into the GPIO Header in the ZynqBerry
Thanks in advance!
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