I've started implementing it.
So as you have pointed out, I have been digging a bit into the free pins of the Zynqberry. I understand that the internal traces I have to use are the EMIOs connected to the bank34 you've mentioned (the actual physical pins that makes connection with the GPIO header).
So I have configured out the Zynqberry to have Enet0 into EMIOs. I have also clikced on MDIO an also assigned to EMIO. This way I cant route those pins to the GPIO header pins.
Now I have placed a MII to RGMII IP core and also a SelectIO Wizard to convert MDIO 3x signals I,O & T into a IO MDIO signal. To do so I have followed the next docs:
-> Specially helpful the picture of page 16, Figure 2-7
and here this image:
So I have ended up with this connections at the PL (see attached picture in case is not available):
Now, I would like to attach the RGMII and data_to_and_from_pins to the Zynq pins.
As far I understand, to do so I need to use the constraints, any guidance of how to do so?EDIT
I would like to attach a device like this:
Into the GPIO Header in the ZynqBerry
Thanks in advance!