Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: kieucua1503 on April 03, 2017, 10:17:47 AM

Title: ZynqBerry V4L2
Post by: kieucua1503 on April 03, 2017, 10:17:47 AM
Hi everyone,

Please tell me, how to configure devicetree to enable v4l2 driver for camera in Zynqberry ?

Thanks very much,
Title: Re: ZynqBerry V4L2
Post by: JH on April 03, 2017, 11:27:15 AM
Hi,
http://www.wiki.xilinx.com/Xilinx+V4L2+driver
br John
Title: Re: ZynqBerry V4L2
Post by: kieucua1503 on April 03, 2017, 11:43:10 AM
Hi John,

Thanks very much,

I have a question.

axi_video_cap {
    compatible = "xlnx,axi-video";
    dmas = <&axi_vdma_1 1>, <&axi_vdma_3 1>;
    dma-names = "port0", "port1";

    ports {
        #address-cells = <1>;
        #size-cells = <0>;

        port@0 {
            reg = <0>;
            direction = "input";
            vcap0_in0: endpoint {
                remote-endpoint = <&scaler0_out>;
            };
        };
        port@1 {
            reg = <1>;
            direction = "input";
            vcap0_in1: endpoint {
                remote-endpoint = <&switch_out1>;
            };
        };
    };
};

I using te0726_demo_3. What "remote-endpoint" in this case ?

Thanks very much.
Title: Re: ZynqBerry V4L2
Post by: JH on April 03, 2017, 12:04:47 PM
Hi,
there is a note on the link, which  i've send:
Note: Xilinx video systems with Linux expect that the DRM framework with the OSD or Xylon IP are used for video output. A video output pipeline using only V4L2 (no DRM) is not supported at this time.
So I'll think it will not work with our reference design IPs.
br
John
Title: Re: ZynqBerry V4L2
Post by: kieucua1503 on April 03, 2017, 12:12:20 PM
Thanks,

Vivado 2016.4 has MIPI CSI-RX core support v4l2 driver. Are you have plan change to it ?
Title: Re: ZynqBerry V4L2
Post by: Antti Lukats on April 03, 2017, 03:58:55 PM
We do everything possible given the status of Xilinx IP cores and their supporting drivers for Linux.

ASFAIK:

1) V4L2 is pretty much impossible to get up and running without full DRM
2) DRM driver setup is extremly complicated and in pretty much all real cases involves some workarounds and/or custom drivers (like dummy clock and codec drivers, etc.)
3) Xilinx CSI2 IP Core does only support for non ZU+ was introduced in 2016.4 only

We have so far not tried out the Xilinx CSI2, in any case it is high value paid IP core :(