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#81
UltraScale / Re: Upgrade Toolchain 2019.2 t...
Last post by evawillms - November 10, 2023, 03:44:13 AMQuote from: JH on November 04, 2022, 08:46:33 AMWhich was working fine.Thank so much.
Hi,
can you try out our 21.2 template with our prebuilt xsa files, this should works:
https://wiki.trenz-electronic.de/display/PD/TE0808+StarterKit Run 3
Template project is in:
https://wiki.trenz-electronic.de/display/PD/TE0808+StarterKit#TE0808StarterKit-DesignSources
copy xsa from prebuilt folder to the petalinux folder and start with point 3 "petalinux-config --get-hw-description"
https://wiki.trenz-electronic.de/display/PD/PetaLinux+KICKstart#PetaLinuxKICKstart-CreatingaProjectfromVivadoProject
in case this doesn't work, check your build environment.
https://wiki.trenz-electronic.de/display/PD/PetaLinux+KICKstart#PetaLinuxKICKstart-PetaLinuxInstallation
I use Ubuntu 20.4 on WSL which was working fine.
br
John
#82
Trenz Electronic FPGA Modules / TE0890 - Power Consumption
Last post by cjc220 - November 04, 2023, 12:43:38 PMHi,
I am relatively new to using FPGA modules and have a potentially basic question regarding the typical power consumption of FPGA boards in an idle state. I am using the TE0890 and the idle power consumption seems to be around 100mA when supplying 5V to the board. This is when the board has not yet been programmed, so everything should be completely idle. This seems quite high as someone who has previously worked with low-power microcontrollers.
After programming the board's flash memory, the current draw on the 5V line drops to approximately 65mA. Following a power cycle, the chip then reads the flash ROM and starts up. Whilst reading the ROM the current is roughly 100mA, this then jumps to roughly 130mA when running the 'Hello World' reference design.
Is there any way to reduce the idle power consumption of this board? I am planning to use this board for a battery powered application so any reduction in power consumption is helpful. Is there a reason that the current drops by 35mA after the ROM has been programmed - is something (i.e., flash memory, FPGA core itself) being switched off?
Thanks in advance for any help.
I am relatively new to using FPGA modules and have a potentially basic question regarding the typical power consumption of FPGA boards in an idle state. I am using the TE0890 and the idle power consumption seems to be around 100mA when supplying 5V to the board. This is when the board has not yet been programmed, so everything should be completely idle. This seems quite high as someone who has previously worked with low-power microcontrollers.
After programming the board's flash memory, the current draw on the 5V line drops to approximately 65mA. Following a power cycle, the chip then reads the flash ROM and starts up. Whilst reading the ROM the current is roughly 100mA, this then jumps to roughly 130mA when running the 'Hello World' reference design.
Is there any way to reduce the idle power consumption of this board? I am planning to use this board for a battery powered application so any reduction in power consumption is helpful. Is there a reason that the current drops by 35mA after the ROM has been programmed - is something (i.e., flash memory, FPGA core itself) being switched off?
Thanks in advance for any help.
#83
Trenz Electronic FPGA Modules / Re: Petalinux-package, unsuppo...
Last post by JH - October 25, 2023, 04:22:20 PMHi,
as I know Eval License did not include bitfile generation. And on installation step, you must add device families which should be installed. not all are selected automatically.
br
John
as I know Eval License did not include bitfile generation. And on installation step, you must add device families which should be installed. not all are selected automatically.
br
John
#84
Trenz Electronic FPGA Modules / Re: Petalinux-package, unsuppo...
Last post by embedded.kyle - October 25, 2023, 03:28:57 PMI have installed a 30 day evaluation of the Enterprise license. However, when I went to check that this was installed correctly by opening the GUI, I've just been using command line tools up to this point) I get the an error trying to open the Trenz Electronic reference design project (see attached).
I can open and synthesize the TE reference design project on Windows. However, PetaLinux tooling requires Linux to run. So I've set up a WSL environment for PetaLinux and also installed Vivado there as well. However, in the WSL run Vivado, the KU040 part is not available. I am not sure why this is and cannot find instructions on how to update the part database.
Do you have instructions on how to update the Vivado parts list to include the parts you use on your boards? Do you have instructions on creating the MCS file from Vivado?
I can open and synthesize the TE reference design project on Windows. However, PetaLinux tooling requires Linux to run. So I've set up a WSL environment for PetaLinux and also installed Vivado there as well. However, in the WSL run Vivado, the KU040 part is not available. I am not sure why this is and cannot find instructions on how to update the part database.
Do you have instructions on how to update the Vivado parts list to include the parts you use on your boards? Do you have instructions on creating the MCS file from Vivado?
#85
Trenz Electronic FPGA Modules / Re: TE0820 Custom Carrier Disp...
Last post by George - October 25, 2023, 11:35:51 AMIf the DPAUX signals are originally at 3.3V and the carrier board operates with 1.8V MIO (Multiplexed I/O) voltage, using a level shifter is indeed a suitable approach to ensure proper voltage translation. The SN74A series level shifters, which are specifically designed for voltage level conversion, can be a suitable choice for this purpose.
Regarding the resistors (R40, R41) on the HPD (Hot Plug Detect) signal, their presence or removal depends on the specific design and requirements of the system. These resistors are often used for managing the hot-plug detection functionality. If you are modifying the design, it's advisable to consult the relevant documentation or consult with the manufacturer to understand the purpose of these resistors and whether they should be removed or kept in your specific configuration.
Regarding the resistors (R40, R41) on the HPD (Hot Plug Detect) signal, their presence or removal depends on the specific design and requirements of the system. These resistors are often used for managing the hot-plug detection functionality. If you are modifying the design, it's advisable to consult the relevant documentation or consult with the manufacturer to understand the purpose of these resistors and whether they should be removed or kept in your specific configuration.
#86
Trenz Electronic FPGA Modules / Re: Petalinux Build [Errno 32]...
Last post by Calista - October 25, 2023, 10:53:40 AMI want to ask about how to upgrade to the latest updates. Does it cause any effects?
#87
UltraScale / Re: TE0802 Data Rate
Last post by JH - October 25, 2023, 07:39:10 AMHi,
over which interface did you want to communicate?
The throughput is also not so easy to check, then always depends on your design, what you have run on the module. So you can influence a lot...therefore we will also not be able to help much further
br
John
over which interface did you want to communicate?
The throughput is also not so easy to check, then always depends on your design, what you have run on the module. So you can influence a lot...therefore we will also not be able to help much further
br
John
#88
Trenz Electronic FPGA Modules / Re: Petalinux-package, unsuppo...
Last post by JH - October 25, 2023, 07:36:42 AMHi,
check your licenses and installed devices.
XCKU035 is available in the free version but xcku040 isn't...
PS: we use Vivado to create mcs, so we can't help much on petalinx flow. This is more a question for AMD forum
br
John
check your licenses and installed devices.
XCKU035 is available in the free version but xcku040 isn't...
PS: we use Vivado to create mcs, so we can't help much on petalinx flow. This is more a question for AMD forum
br
John
#89
Trenz Electronic FPGA Modules / Re: Inter-FPGA-Communication: ...
Last post by Trensica - October 25, 2023, 06:28:16 AMThis configuration is capable of achieving a practical data rate close to 10Mbps from the master device to the clients. It is mentioned that this data rate exceeds the previously used BMC (b1b2) encoding commonly used in S/PDIF in S/PDIF (Sony/Philips Digital Interface) audio connections.
In the context of professional systems, it is suggested that a Low Voltage Differential Signaling (LVDS) implementation using 4 wires would be the optimal choice. LVDS is a signaling method that provides high-speed and noise-immune data transmission. It typically uses a differential pair of wires to transmit data and a separate pair for the complementary signal, resulting in a total of four wires.
In the context of professional systems, it is suggested that a Low Voltage Differential Signaling (LVDS) implementation using 4 wires would be the optimal choice. LVDS is a signaling method that provides high-speed and noise-immune data transmission. It typically uses a differential pair of wires to transmit data and a separate pair for the complementary signal, resulting in a total of four wires.
#90
Trenz Electronic FPGA Modules / Petalinux-package, unsupported...
Last post by embedded.kyle - October 24, 2023, 10:52:00 PMI have used the PetaLinux tools to add an application to the system image and built it. I am now attempting to add it into the bitstream file so that I can program it into my FPGA.
I am using a Trenz electronic TE0841 with an XCKU040. I have not made any changes to the reference design code yet so I'm just using the prebuilt bitstream file provided by Trenz. I have only added a small application in PetaLinux.
I have been following UG1144 as closely as I can.
First I created a project with
Then I imported the HW configuration supplied by Trenz Electronic in the prebuilt directory of their reference design
I found that petalinux-package would fail when I got to that step due to the partition layout. So while in the configuration menu, I modified the partition table to fit the various components based on the error output of petalinux-package. Then I save the configuration.
I created and enabled an application and then added my code to it
Then I built the system image
That populated the images/linux directory with the various build outputs.
Finally, I tried to add the system image to the bitstream supplied by Trenz Electronic with the petalinux-package command
And this is the output I get
What does this error mean? How can I debug this further?
I have followed the same procedure using the 02_35_2i_2gb prebuilt images and the petalinux-package command will then complete without an error. I do not have a KU035 board to test if it successfully inserted my petalinux build and application into the bitstream. But in any case, I do not receive the error that I do when trying to use the KU040.
I am using a Trenz electronic TE0841 with an XCKU040. I have not made any changes to the reference design code yet so I'm just using the prebuilt bitstream file provided by Trenz. I have only added a small application in PetaLinux.
I have been following UG1144 as closely as I can.
First I created a project with
Code Select
petalinux-create --type project --template microblaze --name <PROJECT_NAME>Then I imported the HW configuration supplied by Trenz Electronic in the prebuilt directory of their reference design
Code Select
petalinux-config --get-hw-description <PATH-TO_XSA>I found that petalinux-package would fail when I got to that step due to the partition layout. So while in the configuration menu, I modified the partition table to fit the various components based on the error output of petalinux-package. Then I save the configuration.
I created and enabled an application and then added my code to it
Code Select
petalinux-create -t apps --name <APP-NAME> --enableThen I built the system image
Code Select
petalinux-buildThat populated the images/linux directory with the various build outputs.
Finally, I tried to add the system image to the bitstream supplied by Trenz Electronic with the petalinux-package command
Code Select
petalinux-package --boot --flash-size 64 --flash-intf SPIx4 --fpga /home/kyle/petalinux/bsps/test_board_02_40_1i_2gb.bit --u-boot --kernelAnd this is the output I get
Code Select
kyle@DESKTOP-U0P8IUP:~/petalinux/projects/plnx-rad-test$ petalinux-package --boot --flash-size 64 --flash-intf SPIx4 --fpga /home/kyle/petalinux/bsps/test_board_02_40_1i_2gb.bit --u-boot --kernel
[INFO] Sourcing buildtools
WARNING: Auto detecting MMI file with XSA
INFO: Creating download.bit...
INFO: Fpga bitstream: /home/kyle/petalinux/bsps/test_board_02_40_1i_2gb.bit
INFO: Fpga bitstream MMI file: /tmp/tmp.a5s1iUmgk8/test_board_02_40_1i_2gb.mmi
INFO: Fsbl file: /home/kyle/petalinux/projects/plnx-rad-test/images/linux/fs-boot.elf
INFO: Output download.bit: /home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit
INFO: Getting system flash information...
WARNING: Failed to detect SPI width from bitstream.
WARNING: Using default one: SPIx1.
WARNING: User specified Flash interface SPIx4 is different to the auto detected one SPIx1. Will use the user specified one.
INFO: Add bitstream "/home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit" to 0.
INFO: Add datafile "/home/kyle/petalinux/projects/plnx-rad-test/images/linux/u-boot-s.bin" to 0x640000.
INFO: Add datafile "/home/kyle/petalinux/projects/plnx-rad-test/images/linux/image.ub" to 0x720000.
INFO: Add datafile "/home/kyle/petalinux/projects/plnx-rad-test/images/linux/boot.scr" to 0x1f00000.
INFO: Generating MCS file...
ERROR: [Bitstream 40-51] Unsupported part xcku040-sfva784-1-i in bitfile /home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit.
ERROR: [Writecfgmem 68-7] Could not load bitfile /home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit.
#-----------------------------------------------------------
# Vivado v2021.2 (64-bit)
# SW Build 3367213 on Tue Oct 19 02:47:39 MDT 2021
# IP Build 3369179 on Thu Oct 21 08:25:16 MDT 2021
# Start of session at: Fri Oct 20 08:29:00 2023
# Process ID: 107470
# Current directory: /home/kyle/petalinux/projects/plnx-rad-test/build/package-boot
# Command line: vivado -log /home/kyle/petalinux/projects/plnx-rad-test/build/package-boot//cfgmem.log -jou /home/kyle/petalinux/projects/plnx-rad-test/build/package-boot//cfgmem.jou -mode batch -s /home/kyle/petalinux/projects/plnx-rad-test/build/package-boot//write_cfgmem_hsm.tcl
# Log file: /home/kyle/petalinux/projects/plnx-rad-test/build/package-boot//cfgmem.log
# Journal file: /home/kyle/petalinux/projects/plnx-rad-test/build/package-boot//cfgmem.jou
# Running On: DESKTOP-U0P8IUP, OS: Linux, CPU Frequency: 2687.999 MHz, CPU Physical cores: 10, Host memory: 16634 MB
#-----------------------------------------------------------
source /home/kyle/petalinux/projects/plnx-rad-test/build/package-boot//write_cfgmem_hsm.tcl
# write_cfgmem -force -format MCS -size 64 -interface SPIx4 -loadbit " up 0 /home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit" -loaddata " up 0x640000 /home/kyle/petalinux/projects/plnx-rad-test/images/linux/u-boot-s.bin up 0x720000 /home/kyle/petalinux/projects/plnx-rad-test/images/linux/image.ub up 0x1f00000 /home/kyle/petalinux/projects/plnx-rad-test/images/linux/boot.scr" /home/kyle/petalinux/projects/plnx-rad-test/images/linux/boot.mcs
Command: write_cfgmem -force -format MCS -size 64 -interface SPIx4 -loadbit { up 0 /home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit} -loaddata { up 0x640000 /home/kyle/petalinux/projects/plnx-rad-test/images/linux/u-boot-s.bin up 0x720000 /home/kyle/petalinux/projects/plnx-rad-test/images/linux/image.ub up 0x1f00000 /home/kyle/petalinux/projects/plnx-rad-test/images/linux/boot.scr} /home/kyle/petalinux/projects/plnx-rad-test/images/linux/boot.mcs
Creating config memory files...
Creating bitstream load up from address 0x00000000
Loading bitfile /home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit
ERROR: [Bitstream 40-51] Unsupported part xcku040-sfva784-1-i in bitfile /home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit.
ERROR: [Writecfgmem 68-7] Could not load bitfile /home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit.
0 Infos, 0 Warnings, 0 Critical Warnings and 2 Errors encountered.
write_cfgmem failed
ERROR: [Common 17-39] 'write_cfgmem' failed due to earlier errors.
while executing
"write_cfgmem -force -format MCS -size 64 -interface SPIx4 -loadbit " up 0 /home/kyle/petalinux/projects/plnx-rad-test/images/linux/download.bit" -load..."
(file "/home/kyle/petalinux/projects/plnx-rad-test/build/package-boot//write_cfgmem_hsm.tcl" line 1)
INFO: [Common 17-206] Exiting Vivado at Fri Oct 20 08:29:06 2023...
ERROR: Failed to run Vivado write_cfgmem command.What does this error mean? How can I debug this further?
QuoteUnsupported part xcku040-sfva784-1-i in bitfile
I have followed the same procedure using the 02_35_2i_2gb prebuilt images and the petalinux-package command will then complete without an error. I do not have a KU035 board to test if it successfully inserted my petalinux build and application into the bitstream. But in any case, I do not receive the error that I do when trying to use the KU040.