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1
CYC1000 community projects / Re: Blinky sample design
« Last post by JH on April 18, 2018, 11:14:01 AM »
Hi,

thanks you for sharing your design.
We have upload 2 design know: LED sequencer, like on MAX1000 and NIOS design:
br
John
2
Trenz Electronic FPGA Modules / Re: TE0726 Test board example in TE0726-02
« Last post by JH on April 17, 2018, 10:13:44 AM »
Hi,

if you use our temple (os\petalinux), init_config.sh is used to set correct project path (there is a absolute variable on one petalinux config file, which must be changed)
If you use the template, you did not run the step to create an project (you have one), see:
Petalinux Config is xilinx documentation, we give only basic note. See also:So fastway:
  • 1 use our petalinux template
  • copy hdf into the petalinx template basfolder and run petalinux-config --get-hw-description
  • run petalinux-build
  • use Uboot.elf to generate Boot.bin with SDK (FSBL, bitfile and uboot.elf) --> like Hello World, only replace this elf file with the uboot.elf: https://wiki.trenz-electronic.de/display/PD/SDK+Projects#SDKProjects-Xilinx%22HelloWorld%22onZynq
  • Put image.ub on SD
  • On TE0726, you must put Boot.bin on QSPI, because  CLG225 package support no SD boot. See Zynq TRM from Xilinx
For newer Designs, we add Wiki Documentation with all changes, we have done on the petalinux project (on older project you must check the template file)
So normally only follow this steps:I would recommend to generate Boot.bin on with SDK. We include also bif file in the reference design.
To generate File system on SD, you must change rootfs location on petalinux config --> default also on our 2017.4 test_board it's included as RAMDisk on image.ub


We have a 2017.1 example design online, with debian desktop on SD (here currently with download page decription, wiki description follows on next update):
PS: Special FSBL for QSPI programming is only needed for 2017.3 and newer. And this is only used on GUI setup of Vivado/SDK, see also note: https://wiki.trenz-electronic.de/display/PD/TE0726+Test+Board#TE0726TestBoard-DesignFlow

br
John
3
Trenz Electronic FPGA Modules / Re: TE0726 Test board example in TE0726-02
« Last post by javier.reyes.g on April 16, 2018, 09:26:31 PM »
Thanks JH for the reply.

Apparently, the link I referred was temporary down, but now is online again.

As mentioned, I followed the instructions in the Testboard example, using the scripts provided. The part that I am still confused is the programming part:

1. Generated the project with the vivado_create_project_guimode.sh, and TE::hw_build_design -export_prebuilt on Vivado TCL console.
2. Run init_congif.sh, and follow Petalinux Kickstart:
  a. petalinux-create --type project --template zynq --name <PROJECT_NAME>
  b. petalinux-config --get-hw-description=<PATH_TO_HDF>
  c. petalinux-config, petalinux-config -c kernel, petalinux-config -c rootfs

On this part, in Kickstart documentation does not say anything about the petalinux-config, but in the tutorial mentioned before, says one need to config SD options, and in the petalinux-config -c kernel, one needs to config the USB-to-ethernet driver. Is this correct? Or am I mixing things and creating problems?

3. petalinux-build

In this part, it is not clear for me if I should create the BOOT.BIN with SDK directly, or petalinux-package --boot command, or how exactly should I create it (considering the note about the Zynqberry 726 with Vivado 2017.4, which requires FSBL to create the BOOT.BIN). It is supposed to be a special FSLB precompiled in the Testboard files, but I found nothing, and I tried with SDK a BOOT.BIN using the command:
petalinux-package --boot --fsbl ./images/linux/zynq_fsbl.elf --fpga <path-to-bit-file>.bit --u-boot

4. I copied the image.ub in the first partition of SD card, with the system.dtb. In the second partition, copied the root file system (ubuntu), and created the fstab file (all accordingly with the tutorial mentioned above).

At the end, the SD card in the board, program the flash with the BOOT.BIN, and connect a serial terminal to the port that is created. I can see the first messages on the boot up, kernel version, hardware checking, and then it gets on hold forever. What could be the problem, or what am I doing wrong?

I appreciate any comment
4
Trenz Electronic FPGA Modules / Re: Route the voltage pin to FMC connector on TE0701
« Last post by JH on April 16, 2018, 10:18:35 AM »
Hi,
which voltage did you mean?
VADJ is variable on TE0701 -> attention on some FPGA modules, where FPGA Bank voltage allows max 1.8V.
See also:
br
John
5
Trenz Electronic FPGA Modules / Route the voltage pin to FMC connector on TE0701
« Last post by shengy on April 15, 2018, 01:27:34 AM »
Hi

I purchased a TE0701 for its FMC connector but I found the voltage of the pinout didn't match the FMC card I purchased.

Is there any way to fix it through modifying the firmware or FPGA code?

Best,
6
UltraScale / Re: TEBE0808 2016.4 Vivado script_main.tcl error
« Last post by gordonk on April 13, 2018, 07:14:41 PM »
Hi,
sorry, OK test_board design my mistake.

But see:
https://wiki.trenz-electronic.de/display/PD/TE0803+Test+Board#TE0803TestBoard-DesignFlow
See step 4 create project --> Important: Use Board Part Files, which did not ends with *_tebf0808

Test_board Design is for minimal setup(Module only). Starterkit is for TEBF0808. We provide 2 board part files, one with the minimum setup and one with the basic setup for TEBF0808.
You can use Starterkit design also without linux. Linux is optional. It's only a example. You can also modify PS settings, there are much more options possible, than this basic settings, this depends on the usage.

br
John

I see. Thanks John!
7
UltraScale / Re: TEBE0808 2016.4 Vivado script_main.tcl error
« Last post by JH on April 13, 2018, 07:11:10 PM »
Hi,
sorry, OK test_board design my mistake.

But see:
https://wiki.trenz-electronic.de/display/PD/TE0803+Test+Board#TE0803TestBoard-DesignFlow
See step 4 create project --> Important: Use Board Part Files, which did not ends with *_tebf0808

Test_board Design is for minimal setup(Module only). Starterkit is for TEBF0808. We provide 2 board part files, one with the minimum setup and one with the basic setup for TEBF0808.
You can use Starterkit design also without linux. Linux is optional. It's only a example. You can also modify PS settings, there are much more options possible, than this basic settings, this depends on the usage.

br
John
8
UltraScale / Re: TEBE0808 2016.4 Vivado script_main.tcl error
« Last post by gordonk on April 13, 2018, 06:26:15 PM »
Hi,
Your ZIP time stamp is very strange.
https://wiki.trenz-electronic.de/display/PD/TE0803+StarterKit#TE0803StarterKit-RevisionHistory
You has:                20180411081757
But I've put online: 20180411082116

Block Design, you used has also other timestamp than this one in the newer version. Can you download again please.

This different version is very strange, but don't matter. Can you please try again with the newer version please.

br
John

Hi John,

Thank you for prompt reply.

I downloaded the reference design here  (test_board):
http://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0803/Reference_Design/2017.4/test_board/TE0803-test_board-vivado_2017.4-build_07_20180411081757.zip

I tried the one you referenced (StarterKit) and it worked.
https://wiki.trenz-electronic.de/display/PD/TE0803+StarterKit#TE0803StarterKit-RevisionHistory

StarterKit - TE0803 StarterKit Linux Design
test_board - TE0803 Simple Board Design

I was hoping to use the Simple Board Design to start as we are not using Linux.

-Gordon
9
Thanks for the help. I solved the problem! I wait more time after FPGA strtup. With my old xdc and I needed to wait after startup that FPGA read the flash but I didn't expected that it needs of more than 20 second to start and so I thought thath it didn't work.

But after syntetising with the constranints that you suggested me me now the FPGA load the mcs from the flash instantly! Thank for the help!!
10
Thank you. I'll try to add to the xdc the code that you suggested me looking if this can solve the problem. I'll try and I'll let you know. Thanks for the help!
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