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1
UltraScale / Re: u-boot for TE0803 hangs with ethernet
« Last post by JH on August 17, 2018, 04:34:40 PM »
Hi,

which reference  design version did you use?

Xilinx has changed a lot between 2017.4 and 2018.1( or newer )

So there are many differences between xilinx git hub versions.

We only use petalinux (it's also Yocto based and has additional features), so I can't help so much.

Petalinux/SDK use also zynqmp-zcu102-revB as template and add changes during HDF import. We did not backup this changes, only changes, we must be add manually. See:
See especially device tree entry for ETH, maybe this is missing on your environment. We use also special FSBL (initialise SI5338). Xilinx FSBL, PMU and ATF(BL31) is not compatible during 2017.4 and newer version. So try to use all from the same version, also the correct Xilinx git hub version. We add FSBL templates to our project. For 2018.2 only: Remove compiler flags "-Os -flto -ffat-lto-objects" on 2018.2 SDK to generate FSBL.

To see default device tree after hdf import, you must create either petalinux project (we add a template into the reference design) or include the device tree git hub into SDK and generate default device tree. you must add device tree git hub, see "Generate a Device Tree Source (.dts/.dtsi) files from SDK" on  http://www.wiki.xilinx.com/Build+Device+Tree+Blob

I hope this helps a little bit.
br
John
2
UltraScale / u-boot for TE0803 hangs with ethernet
« Last post by spiwoks on August 16, 2018, 09:08:30 AM »
Hello!

We have a TE0803-01-03EG-1EA with a TE0803. I have been trying to build u-boot using Yocto
with versions pyro and rocko. I have tried the default device tree for the zynqmp-zcu102-revB and
the one from the SDK of a very simple (PS only desgin). Whatever I try, the u-boot always
   HANGS WHEN STARTING THE ETHERNET.

I have tried with the u-boot from the reference starter kit, which works fine. So, I am wondering:
- is there a Yocto recipe that builds u-boot?
- what configs and patches does petalinux apply when building u-boot?

Any help on this is most welcome.

Cheers,
                                Ralf Spiwoks, CERN.
3
UltraScale / Re: Starter Kit fails to build
« Last post by JH on August 15, 2018, 10:39:46 AM »
Hi,

does it work now? Let me know, if you has still problems.

br
John
4
Trenz Electronic FPGA Modules / Re: TE0720 Software Reset
« Last post by JH on August 14, 2018, 08:13:39 AM »
Hi,
i think you search for:
br
John
5
Trenz Electronic FPGA Modules / Re: TE0720 Software Reset
« Last post by sonic on August 13, 2018, 05:47:13 PM »
I should have more clear. Sorry about that.

I am using SD card for boot. Reset works with Switch S1 on carrier card, but for our application would like to control it from software. So, I can use an Ethernet to reset.
6
Trenz Electronic FPGA Modules / Re: TE0720 Software Reset
« Last post by JH on August 13, 2018, 05:35:39 PM »
Hi,

what do you mean? Reboot via Vivado HW manager does not work? QSPI or SD Boot mode?

br
John
7
UltraScale / Re: Starter Kit fails to build
« Last post by JH on August 13, 2018, 05:32:52 PM »
Hi,

i use it with Win10 without problems. This missing connection normally only appears, if the wrong board part is included.

Can you send me the whole log file, if you run vivado_create_project_guimode.sh?
Location: Starterkit\v_log\vivado.log



Which Linux did you use?
Which Reference Design Version? TE0803-Starterkit_noprebuilt-vivado_2018.2-build_02_20180723204638.zip  or TE0803-Starterkit-vivado_2018.2-build_02_20180723204618.zip  or older one?

br
John



8
UltraScale / Re: Starter Kit fails to build
« Last post by charlie5902 on August 13, 2018, 04:57:31 PM »
Ok I changed my board part selection from 7 to 8. Yes I had it wrong.
Tried to create project again after making the change and I still get the exact same errors.

Even though I had selected the wrong board part (which I did) - it still should have finished project creation, should have built, but failed to run on the board.
This was not the case.
The failure is in project creation when I run vivado_create_project_guimode.sh.
It does not complete populating the block design. There are unconnected ports and the design is not complete.
There is something wrong in the tcl scripts that create the project.


9
Trenz Electronic FPGA Modules / TE0720 Software Reset
« Last post by sonic on August 13, 2018, 04:46:16 PM »
Hello,

I am trying to software reset TE0720 with TE03-05 carrier card.
I am using bare-metal application.

Appreciate any help!

Best Regards
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