Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: anttiw on June 20, 2017, 08:49:04 AM

Title: TE0720 + TE703 disable pull up resistor during power-up
Post by: anttiw on June 20, 2017, 08:49:04 AM
Hi,

is there an option to disable pull-up resistors during power-up sequence with TE720 starter kit?

Zynq pin PUDC_B is controlled via CPLD.

-antti
Title: Re: TE0720 + TE703 disable pull up resistor during power-up
Post by: Oleksandr Kiyenko on June 20, 2017, 05:12:38 PM
Hello,

You need to update CPLD firmware. Please send e-mail to support@trenz-electronic.de

Best regards
Oleksandr Kienko