Hi there,
is there any document describing the use of the Ethernet PHY LEDs on the TE0720?
Normally the connection and traffic LEDs are provided by the PHY chip 88E1512 but in this case the information goes to the
CPLD and the traffic and the connection LEDs on the carrier board (e.g. TE0706) are connected to the Zynq.
How is this intended to be used?
Thank you very much in advance,
Dino
Hi,
LED Pins from ETH PHY of the TE0720 module are not routed to the connector --> module B2B connector pins are limited and Status LEDs are not needed for functionality.
On TE0706 ETH connector Pins goes to B2B connector, so they are optional LEDs for the module, which is connected, see schematic :
- https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0706/REV02/Documents
br
John
Hi John,
thank you very much for your reply.
So on the TE0720, the information needed (PHY_LED0/1/2) goes to the CPLD. Is there any information about what is done with these signals in the CPLD? Is there a possibility to drive those signals back to the FPGA? Maybe the X1, X2... signals?
Kind regards,
Dino
Hi,
at the moment only older documents:
- https://wiki.trenz-electronic.de/pages/viewpage.action?pageId=3834226
rework of CPLD description is planned, but I can't tell any timeline.
br
John
Thank you very much John,
this is, what I was looking for!
Kind regards,
Dino
I'd also like to see this functionality (CPLD providing LED pins back to FPGA) as well.
Any timeline for this?
Hi,
link above is obsolete.
We add important notes from the older CPLD description here:
https://wiki.trenz-electronic.de/display/PD/TE0720+CPLD
LED should be the same. LEDs functionality can be changed on runtime. See wiki description. MDIO interface example for FSBL is included into the reference design(in this case read out mac).
I can't tell you any timeline for documentation update at the moment.
br
John