Trenz Electronic GmbH Support Forum

Community => CYC1000 community projects => Topic started by: gawrcool on August 20, 2019, 03:42:11 PM

Title: TEI0003-02-test_board-quartus_18.1-20190402.zip
Post by: gawrcool on August 20, 2019, 03:42:11 PM
Hi,
In the example given I've two remarks.
1. The path to the Memory initialization file is absolute, better to have a relative one
2. The hex file given doesn't work, so no UART output and  no ("Spirit level" mode) but the remaining modes work since there are not related to the NIOS
I've attached a .hex file that is working (keep the example architecture).
Also for information I modified my system to use the SDRAM @ 150MHz and the NIOS @ 200MHz.
Regards,
Title: Re: TEI0003-02-test_board-quartus_18.1-20190402.zip
Post by: Thomas D on August 21, 2019, 09:35:32 AM
Hi,
we actually work on a solution, where the correct path will be set automatically.
At the moment you have to set the correct path for the *.hex file manually. See step 2 - 5 in the link below:
- https://wiki.trenz-electronic.de/display/PD/TEI0003+Test+Board#TEI0003TestBoard-DesignFlow (https://wiki.trenz-electronic.de/display/PD/TEI0003+Test+Board#TEI0003TestBoard-DesignFlow)
I have tried the .hex file in the zip file again and it works.
- did you use win os or linux os?
- which quartus version did you use?
- which step from the design flow (link above) failed?
br
thomas

Title: Re: TEI0003-02-test_board-quartus_18.1-20190402.zip
Post by: gawrcool on August 21, 2019, 10:48:26 AM
Hi,
My fault. With a fresh install of the example and with modifying the path for the given hex file, it works.
The problem is the Platform Designer that doesn't tell you (no warning nor info message) that the mem_init initialization file is missing.
I use Quartus 18.1.0 on Ubuntu 18.04.
Regards,
Olivier
Title: Re: TEI0003-02-test_board-quartus_18.1-20190402.zip
Post by: gawrcool on September 08, 2019, 09:56:18 AM
About
QuoteAlso for information I modified my system to use the SDRAM @ 150MHz and the NIOS @ 200MHz.
After further tests and to be compliant with the Timing analyser, the max frequency I can reach is about 100-110 MHz for the NIOS IIe and about the same for the SDRAM controller.