Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: MarekC on March 21, 2014, 02:21:30 PM

Title: USB Phy missing (TE0720 + TE0701-03)
Post by: MarekC on March 21, 2014, 02:21:30 PM
Hello,

I built my u-boot and kernel successfully. I also prepared FSBL and boot.bin and placed everything on SDCARD.
When kernel boots, I get:

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
xusbps-dr e0002000.ps7-usb: Unable to init USB phy, misg?


I replaced my fsbl.elf with the file located in archive I downloaded from Web: TE0720-GigaZee-Reference-Designs-master\TE0720-01_Base_Vivado-2013.4\sw_export\FSBL\Debug\fsbl.elf,
repacked boot.bin and kept other files unmodified.
When kernel boots, I get USB OK:

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
ULPI transceiver vendor/product ID 0x0424/0x0007
Found SMSC USB3320 ULPI transceiver.
ULPI integrity check: passed.
xusbps-ehci xusbps-ehci.0: Xilinx PS USB EHCI Host Controller
xusbps-ehci xusbps-ehci.0: new USB bus registered, assigned bus number 1
xusbps-ehci xusbps-ehci.0: irq 53, io mem 0x00000000
xusbps-ehci xusbps-ehci.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected


I tried different steps to build correct fsbl.elf without success.
I started with standard hardware designs described in Vivado Flow or Base XPS I found in Wiki.
I just added CD and WP signals for SDCard in configuration only (MIO12/MIO13). I also checked 14.5, 2013.4 tools versions.

Any idea how to solve this problem?
Title: Re: USB Phy missing (TE0720 + TE0701-03)
Post by: Oleksandr Kiyenko on March 21, 2014, 02:44:42 PM
Hello Marek,

USB PHY should be reset before use. In our reference project it's done in u-boot, not in FSBL. In FSBL you just have to enable USB controller.
As for FSBL build, we use code generated by older version of Vivado (Vivado 2013.4 use it's own FAT library which have problems).
Best way is import FSBL project and BSP from "sw_export" folder of reference project.

WBR
Oleksandr Kiyenko