Hello everyone,
If I want to figure out the speed (theoretical maximum) of the memory on the zynqberry (128MB version), is the following the correct approach ?
memory clock: 533MHz
Bus width: 16bits (2bytes)
DDR -> Double data rate memory. 2 memory operations possible per cycle: Multiply by two
533MHz * 2B * 2(because DDR) = 2132MB/s
It is mainly the DDR issue I wonder about.
Thank you and best regards
Should be correct.
In practice, the speed of the memcopy performed by CPU is in the order of 200 Mbyte/sec and drops only a little when the FPGA initiates DMA transfers at a rate of 400 Mbyte/sec concurrently.