Print Page - TE0713-01 Reference Design Clock Error

Title: TE0713-01 Reference Design Clock Error
Post by: logictronix_technologies on March 12, 2021, 09:27:28 AM

Hello,

We are working on TE0713-01 Board. And we followed the example design that was provided in this link;
https://wiki.trenz-electronic.de/display/PD/TE0713+Test+Board

We followed all the steps exactly, same block design and same vivado version, but we got clock error. It was saying that the provided clock was not in the valid clock frequency range. We could not go beyond this. We stuck there. Could somebody help to solve this error?

Thanks and Regard,

Title: Re: TE0713-01 Reference Design Clock Error
Post by: JH on March 12, 2021, 10:26:02 AM

Hi,
can you tell me the zip name of the download.
can you send me the error log of the project generation? --> it's in the v_log subfolder of the project delivery when you has create the project with our scripts-

Did you test our prebuilt binaries, does they work?

br
John

Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: logictronix_technologies on March 12, 2021, 09:27:28 AM