Recent Posts

Pages: [1] 2 3 ... 10
1
Hello,

Can you give us a direct link to these resources?

Best regards
Oleksandr Kiyenko
2
Trenz Electronic FPGA Modules / Reagrding logging in the trenz wiki
« Last post by pranjali on May 24, 2018, 05:11:57 PM »
Hi,
I am unable to download these IP cores: axis_fb_conv and video_to_hdmi. I have tried to log in however it gives errors saying re-enter the username, password and captcha. Inspite of writing the correct username and password I am unable to log in. Kindly, help me to resolve this issue.
Thanking you,

Kind regards,
Pranjali
3
Trenz Electronic FPGA Modules / Re: TE0726 boot problem
« Last post by JH on May 24, 2018, 01:58:47 PM »
Hi,
since 2017.4 Xilinx SDSoC use same default install folder for included Vivado than normal Vivado installation.
On Windows they have included SDSoC settings on normal".../Vivado/{Vivado_version}/settings64.sh". This loads normally  also ".settings64-Vivado.sh" and  ".settings64-SDK_Core_Tools.sh" and unfortunately in the new version also all SDSoC environments. So i've replaced this  because other Eclipse plugin SDSoC SDK is used with SDSoC settings instead of normal SDK.

I thought on Linux is the same (I didn't try out, because I've only win os.).

Replace:
VIVADO_XSETTINGS=${XILDIR}/Vivado/${VIVADO_VERSION}/.settings64-Vivado.sh with
VIVADO_XSETTINGS=${XILDIR}/Vivado/${VIVADO_VERSION}/settings.sh
The same for SDK.


Can you tell me which settings...sh do you see on your Vivado installation path.
Can you send me this information to "support@trenz-electronic.de", also add this *.sh file on the email. I will check, if I can generate a general bugfix for this problem.

br
John

4
Trenz Electronic FPGA Modules / Re: TE0726 boot problem
« Last post by javier.reyes.g on May 24, 2018, 01:29:26 PM »
Hi JH

Sorry to bother again... The recent build that you edited and uploaded with the change for the 128MB variant, I have tried it today and there seems to be a problem with the scripts:

Code: [Select]
javier@ubuntu:~/Downloads/test_board$ source /opt/Xilinx/Vivado/2017.4/settings64.sh
javier@ubuntu:~/Downloads/test_board$ chmod +x _create_linux_setup.sh
javier@ubuntu:~/Downloads/test_board$ ./_create_linux_setup.sh
------------------------Set design paths----------------------------
-- Run Design with: _create_linux_setup.sh
-- Use Design Path: /home/javier/Downloads/test_board
--------------------------------------------------------------------
------------------------TE Reference Design-------------------------
--------------------------------------------------------------------
-- (c)  Go to CMD-File Generation (Manual setup)                   
-- (d)  Go to Documentation (Web Documentation)                     
-- (x)  Exit Batch (nothing is done!)                               
-- (0)  Create minimum setup of CMD-Files and exit Batch           
-- (1)  Create maximum setup of CMD-Files and exit Batch           
----                                                               
 Select (ex.:'0' for min setup):
0
---------------------------Minimal Setup----------------------------
--- 1. Open design_basic_settings.sh with text editor
--- 2. Set Xilinx Installation path, default: XILDIR=/opt/Xilinx/
--- 3. Set the Board Part you bought, example: PARTNUMBER=te0726-3m
--- For available names see: ./board_files/TExxxx_board_files.csv
--- 4. Save design_basic_settings.sh
--- 5. To create vivado project, execute: ./vivado_create_project_guimode.sh
--- Use Trenz Electronic Wiki for more information:
--- https://wiki.trenz-electronic.de/display/PD/Project+Delivery
--------------------------------------------------------------------
Press [Enter] key to continue...
javier@ubuntu:~/Downloads/test_board$ vim design_basic_settings.sh
javier@ubuntu:~/Downloads/test_board$ chmod +x vivado_create_project_guimode.sh
javier@ubuntu:~/Downloads/test_board$ chmod +x vivado_open_existing_project_guimode.sh
javier@ubuntu:~/Downloads/test_board$ ./vivado_create_project_guimode.sh
------------------------Set design paths----------------------------
-- Run Design with: vivado_create_project_guimode.sh
-- Use Design Path: /home/javier/Downloads/test_board
---------------------Load basic design settings---------------------
--------------------------------------------------------------------
------------------Set Xilinx environment variables------------------
-- Use Xilinx Version: 2017.4 --
--Info: Configure Xilinx Vivado Settings --
-- Info: /opt/xilinx//Vivado/2017.4/.settings64-Vivado.sh not found --
--Info: Configure Xilinx SDK Settings --
-- Info: /opt/xilinx//SDK/2017.4/.settings64-SDK_Core_Tools.sh not found --
--Info: Configure Xilinx LAbTools Settings --
-- Info: /opt/xilinx//Vivado_Lab/2017.4/settings64.sh not found --
--------------------------------------------------------------------
-- Error: Need Vivado to run. --
---------------------------Error occurs-----------------------------
--------------------------------------------------------------------
javier@ubuntu:~/Downloads/test_board$ vim design_basic_settings.sh
javier@ubuntu:~/Downloads/test_board$

Checking the script vivado_create_design.sh, I have seen that it checks this:

Code: [Select]
source $bashfile_path/design_basic_settings.sh
echo --------------------------------------------------------------------
echo ------------------Set Xilinx environment variables------------------
VIVADO_XSETTINGS=${XILDIR}/Vivado/${VIVADO_VERSION}/.settings64-Vivado.sh
SDK_XSETTINGS=${XILDIR}/SDK/${VIVADO_VERSION}/.settings64-SDK_Core_Tools.sh
LABTOOL_XSETTINGS=${XILDIR}/Vivado_Lab/${VIVADO_VERSION}/settings64.sh
if [ "${ENABLE_SDSOC}" == "" ]; then ENABLE_SDSOC=0; fi
if [ ${ENABLE_SDSOC} == 1 ]; then
  echo --Info: SDSOC use Vivado and SDK from SDx installation --
  SDSOC_XSETTINGS=${XILDIR}/SDx/${VIVADO_VERSION}/settings64.sh
  VIVADO_XSETTINGS=${XILDIR}/Vivado/${VIVADO_VERSION}/settings64.sh
  SDK_XSETTINGS=${XILDIR}/SDK/${VIVADO_VERSION}/settings64.sh
fi

The conditional looking for ENABLE_SDSOC == "" is causing that it never finds the right path for the settings (In this case, /opt/Xilinx/Vivado/2017.4/settings.sh), and tries to read a non-existing file (/opt/Xilinx/Vivado/2017.4/.settings64-vivado.sh). Is it perhaps an error during the update?

Thanks in advance

Regards
5
Trenz Electronic FPGA Modules / Re: I can't program the TE0720 flash with JTAG
« Last post by JH on May 23, 2018, 11:16:02 AM »
Hi,

open \sw_lib\sw_apps\zynq_fsbl_flash\src\main.c and search for "TE Mod"
i've deactivated DDR initialisation (int's not needed but so it's faster) and I changed Boot Mode fix to JTAG, instead read back from MIO Pins.

br
John
6
Trenz Electronic FPGA Modules / Re: I can't program the TE0720 flash with JTAG
« Last post by joseer on May 23, 2018, 11:02:04 AM »
Hi John,

Many thanks for the help, I already had a test board project for vivado 2017.3 so I only replaced the source files in the FSBL project for the ones in the "zynq_fsbl_flash" folder, now I could program the flash and everything works as before.

So just to clarify, the only difference between the default FSBL and this one (zynq_fsbl_flash) is that it changes to JTAG Boot Mode?

Thanks again.
7
Trenz Electronic FPGA Modules / Re: I can't program the TE0720 flash with JTAG
« Last post by JH on May 23, 2018, 07:58:31 AM »
Hello,
did you use special FSBL? Xilinx has changed Flash Programming and micro Uboot with 2017.3 and newer:
You must select FSBL on Vivado/SDK(program_flash) now. If QSPI Boot Mode is set, the default FSBL goes into error state, if flash is empty. If flash is not empty default should also work.We provide a special FSBL with our 2017.4 design:Source code is as SDK template included. Changes will set JTAG Boot Mode for FSBL only.

br
John

8
Trenz Electronic FPGA Modules / I can't program the TE0720 flash with JTAG
« Last post by joseer on May 22, 2018, 07:08:00 PM »
Hello,

Before explain the issue I'd like to clarify that we've been using successfully a TE0720 in one of our projects using our custom carrier board and the TE0790-02 JTAG tool, with Vivado (2017.3), using SDK to program the flash with the fsbl and our application, no issues regarding programming and hardware.

We've got two TE0720 boards, and today I started to work with the second one, which was test it when we bought it but never used more intensively, always we kept it as spare unit.

Well the thing is that one of the times I was programming the TE0720 in our custom carrier board (using the TE0790-02 JTAG tool), for some reason the process got stuck at 0%..., I waited a while but I finally had to cancelled it and since then when I'm trying to program I've got:

Code: [Select]
cmd /C program_flash -f \
C:\Projects_dev\MainProjects\TDM\TDMv2\Firmware\TDM_TE0720\TDMv2.sdk\TDMv16_frimware\bootimage\BOOT.bin \
-offset 0 -flash_type qspi_single -fsbl \
C:\Projects_dev\MainProjects\TDM\TDMv2\Firmware\TDM_TE0720\TDMv2.sdk\fsbl\Debug\fsbl.elf \
-cable type xilinx_tcf url TCP:127.0.0.1:3121

****** Xilinx Program Flash
****** Program Flash v2017.3 (64-bit)
  **** SW Build 2018833 on Wed Oct  4 19:58:22 MDT 2017
    ** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.

Connecting to hw_server @ TCP:127.0.0.1:3121

WARNING: Failed to connect to hw_server at TCP:127.0.0.1:3121
Attempting to launch hw_server at TCP:127.0.0.1:3121

Connected to hw_server @ TCP:127.0.0.1:3121
Available targets and devices:
Target 0 : jsn-JTAG-ONB4-251633000D5DA
Device 0: jsn-JTAG-ONB4-251633000D5DA-4ba00477-0

Retrieving Flash info...

Initialization done, programming the memory
BOOT_MODE REG = 0x00000001
WARNING: [Xicom 50-100] The current boot mode is QSPI.
If flash programming fails, configure device for JTAG boot mode and try again.
Problem in running uboot
Flash programming initialization failed.

ERROR: Flash Operation Failed

I did try to program it with our TE0703-05 carrier board but unfortunately got same results, I also checked with the first TE0720 and all works with this one (TE0790-02 and TE0703-05) so the problem seems to be on this second TE0720 unit, which I would like to clarify that was initially working ok for a few times.

The board seems alive (at least in terms of power), the red LED (LED2) is flashing and obviously the green LED (LED3) is on all the time as the FPGA is not getting configured. 

Any idea what's wrong and if is possible to recover this board?

Many thanks.

10
Trenz Electronic FPGA Modules / Re: TE0720 board initialization file
« Last post by JH on May 22, 2018, 11:09:21 AM »
Hi,
it's included into the reference design, for different vivado versions:
PS: your document link is from an older documentation. We put this to our archive to until we have transferred a important notes from this older documentation.
To get all sources and documents, follow links from:brJohn
Pages: [1] 2 3 ... 10