Trenz Electronic GmbH Support Forum

Trenz Electronic Products => Trenz Electronic FPGA Modules => Topic started by: ledel on March 23, 2018, 11:56:01 PM

Title: TE0715-04-12S-1C and TE0701-06: using ARM-20 for JTAG?
Post by: ledel on March 23, 2018, 11:56:01 PM
I loaded the prebuilt boot.bif and BOOT.bin from te0715-test_board-vivado_2017.4-build_01_20180105195436.zip and I can access U-Boot via the FTDI serial bridge.

A quick test with Toolz shows that the ARM DAP is accessible from the FDTI bridge as well.

How do I get access to the ARM DAP via the ARM-20 connector at J15?
Title: Re: TE0715-04-12S-1C and TE0701-06: using ARM-20 for JTAG?
Post by: JH on March 26, 2018, 08:51:32 AM
Hi,

over FPGA PL side:
br
John








Title: Re: TE0715-04-12S-1C and TE0701-06: using ARM-20 for JTAG?
Post by: ledel on March 26, 2018, 02:09:41 PM
Thanks for confirming how the pins are routed from the connector to the FPGA.

What I'm hoping to find is a prebuilt U-Boot/bitstream that provides the FGPA's internal routing that is apparently required to make J15 functional.

Lea
Title: Re: TE0715-04-12S-1C and TE0701-06: using ARM-20 for JTAG?
Post by: JH on March 26, 2018, 02:17:56 PM
Hi,
Quote

What I'm hoping to find is a prebuilt U-Boot/bitstream that provides the FGPA's internal routing that is apparently required to make J15 functional.

Sorry, we haven't. You must generate this by yourself.  You can start with our reference design, enable PJTAG over  PL on PS IP and set correct IO constrains from schematics. Generate Design and all other files like described here:
br
John