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#1
Trenz Electronic FPGA Modules / Re: Issue with TE0720 module a...
Last post by Waldi3141 - December 09, 2024, 10:21:58 AMHello ritayandhara,
you could start by connecting the two leds FLED1 and 2 to the VIO ip in your block design. Check whether you can turn them on and off from the hardware manager.
They go to the FPGA Pins U7 and R7 as can be seen in this spreadsheet:
https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Pinout/4x5_series_pinout_tracelength.xlsx
Then you can connect them to an AXI GPIO IP and and control them from linux via your keyboard. You have to rebuild petalinux for that and generate the programming files
https://wiki.trenz-electronic.de/display/PD/PetaLinux+KICKstart#PetaLinuxKICKstart-PetaLinux2023.2
you could start by connecting the two leds FLED1 and 2 to the VIO ip in your block design. Check whether you can turn them on and off from the hardware manager.
They go to the FPGA Pins U7 and R7 as can be seen in this spreadsheet:
https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Pinout/4x5_series_pinout_tracelength.xlsx
Then you can connect them to an AXI GPIO IP and and control them from linux via your keyboard. You have to rebuild petalinux for that and generate the programming files
https://wiki.trenz-electronic.de/display/PD/PetaLinux+KICKstart#PetaLinuxKICKstart-PetaLinux2023.2
#2
Arrow USB Programmer2 / Re: cannot write to flash on U...
Last post by sessl3r - November 27, 2024, 02:40:07 PMHi,
just as an information, we workaround this now by forwarding the USB-device via usbip to a virtual Windows10 machine. This works very good even in a Windows 10 VM.
The Linux workstation the programmer is connected to exports the usb device using usbip (TCP based). The VM can use the usb device cleanly. Programming and debugging via JTAG as well as UART works without any issues so far.
https://sourceforge.net/projects/usbip/
https://github.com/vadimgrn/usbip-win2
Regards,
Tobias
just as an information, we workaround this now by forwarding the USB-device via usbip to a virtual Windows10 machine. This works very good even in a Windows 10 VM.
The Linux workstation the programmer is connected to exports the usb device using usbip (TCP based). The VM can use the usb device cleanly. Programming and debugging via JTAG as well as UART works without any issues so far.
https://sourceforge.net/projects/usbip/
https://github.com/vadimgrn/usbip-win2
Regards,
Tobias
#3
Trenz Electronic FPGA Modules / Re: Reflashing ZynqBerryZero
Last post by JH - November 27, 2024, 11:54:08 AMHi,
sorry for late reply.
Do you have TE0727-04 revision?
In this case, you can set boot mode to JTAG only for programming. It's DIP S1, which you need to set ON to set JTAG only.
br
John
sorry for late reply.
Do you have TE0727-04 revision?
In this case, you can set boot mode to JTAG only for programming. It's DIP S1, which you need to set ON to set JTAG only.
br
John
#4
Trenz Electronic FPGA Modules / Re: Issue with TE0720 module a...
Last post by ritayandhara - November 27, 2024, 10:22:16 AMIm using the TE0720-03-1CF board. https://shop.trenz-electronic.de/de/TE0720-04-62I33ML-SoC-Modul-mit-AMD-Zynq-7020-2I-1-GByte-DDR3L-8-GByte-eMMC-4-x-5-cm-LP?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0720/REV03/Documents
and I am using Xilinx Vivado 2024 edition. I just want to use the UART and the mini-usb port to blink an led in which the input has to be taken from the user through the keyboard. Now when I define pins into the constraint file, sometimes it cannot recognize the pin. Any help on how to proceed with this would be appreciated. Thank You again.
and I am using Xilinx Vivado 2024 edition. I just want to use the UART and the mini-usb port to blink an led in which the input has to be taken from the user through the keyboard. Now when I define pins into the constraint file, sometimes it cannot recognize the pin. Any help on how to proceed with this would be appreciated. Thank You again.
#5
Trenz Electronic FPGA Modules / Re: Issue with TE0720 module a...
Last post by Waldi3141 - November 26, 2024, 12:04:15 PMHello ritayandhara,
so you see no console prints when booting linux ? I recommend SmarTTY, it lists all devices, you only need to set the Baudrate to 115200. You should not be asked for credentials since the petalinux design has autologin activated, given you are using our latest test board design.
Are you using our latest reference design?
https://wiki.trenz-electronic.de/display/PD/TE0720+Test+Board
https://shop.trenz-electronic.de/en/TE0720-04-31C33MA-SoC-Module-with-AMD-Zynq-7014S-1C-1-GByte-DDR3L-8-GByte-eMMC-4-x-5-cm?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0720/Reference_Design/2023.2/test_board
On older versions login is:
User Name: root
Password: root
so you see no console prints when booting linux ? I recommend SmarTTY, it lists all devices, you only need to set the Baudrate to 115200. You should not be asked for credentials since the petalinux design has autologin activated, given you are using our latest test board design.
Are you using our latest reference design?
https://wiki.trenz-electronic.de/display/PD/TE0720+Test+Board
https://shop.trenz-electronic.de/en/TE0720-04-31C33MA-SoC-Module-with-AMD-Zynq-7014S-1C-1-GByte-DDR3L-8-GByte-eMMC-4-x-5-cm?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0720/Reference_Design/2023.2/test_board
On older versions login is:
User Name: root
Password: root
#6
Trenz Electronic FPGA Modules / Re: TE0712_03
Last post by JH - November 26, 2024, 08:16:56 AMHi,
which reference CLK did you use for the CLK wizard IP? Does it match to the settings of your MMCM(CLK wizard)
ILA or VIO debug core are mostly not visible when the reference clk is not available.
br
John
which reference CLK did you use for the CLK wizard IP? Does it match to the settings of your MMCM(CLK wizard)
ILA or VIO debug core are mostly not visible when the reference clk is not available.
br
John
#7
Trenz Electronic FPGA Modules / Re: Statement of volatility
Last post by JH - November 26, 2024, 08:05:16 AMHi,
TRM includes a list of storage devices, maybe this helps you:
https://wiki.trenz-electronic.de/display/PD/TE0720+TRM#TE0720TRM-InitialDeliveryState
You can identity used components from the list with the designator(IC in the TRM Table) in the schematic
https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0720/REV04/Documents/SCH-TE0720-04-62I33MA.PDF
br
John
TRM includes a list of storage devices, maybe this helps you:
https://wiki.trenz-electronic.de/display/PD/TE0720+TRM#TE0720TRM-InitialDeliveryState
You can identity used components from the list with the designator(IC in the TRM Table) in the schematic
https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0720/REV04/Documents/SCH-TE0720-04-62I33MA.PDF
br
John
#8
Trenz Electronic FPGA Modules / Re: Oscillator on TE0720?
Last post by JH - November 26, 2024, 07:57:39 AMHi,
this module use 33.3MHz (SiT8008BI-73-XXS-33.333333E) for PS_CLK. See schematics page 11:
https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0720/REV04/Documents/SCH-TE0720-04-62I33MA.PDF
br
John
this module use 33.3MHz (SiT8008BI-73-XXS-33.333333E) for PS_CLK. See schematics page 11:
https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0720/REV04/Documents/SCH-TE0720-04-62I33MA.PDF
br
John
#9
Trenz Electronic FPGA Modules / Issue with TE0720 module and t...
Last post by ritayandhara - November 22, 2024, 04:49:27 AMHi,
I have a carrier board from trenz which is TE0703-05 which im using with a xilinx fpga module ( TE0720 SoC) . Now when I go for the serial communication through any serial communicator like Putty or tera term , I cannot make a connection with the board. It keeps asking for some linux username and password. My main goal is to take the input from the user to do certain things with fpga eg. changing the frequency or may be blinking an led. But I cannot establish the connection. Any help will be greatly appreciated. Thank You
I have a carrier board from trenz which is TE0703-05 which im using with a xilinx fpga module ( TE0720 SoC) . Now when I go for the serial communication through any serial communicator like Putty or tera term , I cannot make a connection with the board. It keeps asking for some linux username and password. My main goal is to take the input from the user to do certain things with fpga eg. changing the frequency or may be blinking an led. But I cannot establish the connection. Any help will be greatly appreciated. Thank You
#10
Trenz Electronic FPGA Modules / CR00103 Certus-NX LiteX suppor...
Last post by schaeferk - November 20, 2024, 02:06:04 PMHi,
The CR00103 Certus-NX development board ships with a pre-installed image that contains a VexRiscv-based SoC built with LiteX and Migen. As far as I know, the board is not officially supported by LiteX. Is it possible or planned to provide the necessary configuration files to build custom SoCs with LiteX for this board?
Kind regards,
Konstantin
The CR00103 Certus-NX development board ships with a pre-installed image that contains a VexRiscv-based SoC built with LiteX and Migen. As far as I know, the board is not officially supported by LiteX. Is it possible or planned to provide the necessary configuration files to build custom SoCs with LiteX for this board?
Kind regards,
Konstantin