News:

Attention: For security reasons,please choose a user name *different* from your login name.
Also make sure to choose a secure password and change it regularly.

Main Menu

Migrating MIG on TE0841 from Rev1 to Rev2

Started by yuri, January 08, 2019, 01:51:54 PM

Previous topic - Next topic

yuri

Hello everyone,

I'm trying to migrate our company's designs from TE0841 Rev1 to Rev2, and I have problems with making DDR4 MIG work.

I had no problems with memory on Rev1.

When I try to use Rev2 module and Rev2 board files (which I took from IBERT example project), memory controller isn't responding. I've made a simple project just to read/write memory from MicroBlaze, and it hangs when I try to access bank 44 memory via AXI. I use Vivado 2017.2, Xilinx-compatible Xmod, "ddr4 sdram b44" memory interface in MIG (new DDR4 chip is shown correctly, all settings default) and sysclk200 reference clock.

Is there any simple example project for Rev2 TE0841 module which performs some basic DDR4 reading/writing, so I could use it for investigating what went wrong in my case?

Best regards

JH

Hi,
please try out our 17.4 reference design with memory:
REV02 has 2x1GB DDR4 and other MIG settings. Setup is included on the REV02 board part files. SI5338 is also preprogrammed on REV02 so SI5338 programming over mcs is optional on REV02.
br
John

yuri

Alright, after switching to Vivado 2017.4 memory controller works.

Thanks a lot.