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Author Topic: PLL clock generators (Module and Board)  (Read 3746 times)

ziladdev

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PLL clock generators (Module and Board)
« on: November 14, 2018, 11:31:17 AM »
Hi folks,

I have a few questions regarding the PLL clock generators. My Setup consists of :
  • TE803 ZU4EV
  • TEBF0808 carrier board

The TEBF0808 carrier board is equipped with a Silicon Labs I2C programmable quad PLL clock generator Si5338A (U35). It's output frequencies can be programmed by using the I2C bus with address 0x70. On the other hand, the MPSoC module also has a 4-channel programmable PLL clock generator, U5. The I2C signals of the module's PLL (U5) are routed through the B2B connector (J2-90, J2-92) to the TEBF0808 carrier board.

There are two 8-channel I2C switches,  U16 and U27 on the Carrier board.

The onboard Si5338A (U35) is  connected to I2C switch U16
The module Si5338A (U5) is  connected to I2C switch U27.

Table 20 of the TEBF0808 lists the translated I2C addresses as seen by the MPSoC.

Questions:
- How is the I2C addresses of each of the PLL generators? What are the correct addresses?

Table 20 shows for instance that the on-board PLL has 0x70 as address, however, the Module's TRM TE803 also states that the I2C address of the module's PLL is  (Table 11): 1110000b = 0x70.
PMU source code for MPSoC module also defines the address of the on module PLL as:
si5338.h
Code: [Select]
#define IIC_ADDR 0x70

If this is correct, and it certainly looks so, then the adress conflicts with that given in Table 20 of the TEBF0808 as both PLL clk generators would have the same address...

SI5338 programming
https://wiki.trenz-electronic.de/display/PD/Si5338 hints at using ClockBuilder Desktop, however only clock builder pro seem to be available for download. Could Trenz please update the wiki section for this as the former software version is no longer available.

Thanks for all help !



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JH

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Re: PLL clock generators (Module and Board)
« Reply #1 on: November 14, 2018, 02:28:41 PM »
Hi,

you must configure I2C switch at first, on the reference design it's done with our modified FSBL, also SI configuration (template included):

Both I2C switches are also included into the device tree of petalinux:
so bus can be selected directly, for example: i2cdetect -y -r 0, i2cdetect -y -r 1 i2cdetect -y -r 2 .... (enumeration depends on linux and connected I2C) 0 is basic I2C0 controller from zynq 1 is I2C1 controller from zynq, when activated or first mux output from the I2C mux with the lower address and so one.



https://wiki.trenz-electronic.de/display/PD/Si5338
--> There is a note on this pages, that SI has changed tools for SI5338 (we recognized this for some weeks). At the moment we provide only the template project for theClockBuilder Desktop but we will update step by step to clock builder pro.

br
John
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ziladdev

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Re: PLL clock generators (Module and Board)
« Reply #2 on: November 14, 2018, 02:54:58 PM »
JH, thanks for the answer.

1) Could you please confirm that the TE803 SI is the same as the one on the carrier board, i.e. both have 0x70 as adress.
2) Please confirm that Table 20 (Carrier board TRM), Second part, I2C Switch position 4, corresponds to Si5388 on TE803 as the table mentions only the TE808 modules which seem to have Si5345.

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JH

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Re: PLL clock generators (Module and Board)
« Reply #3 on: November 19, 2018, 12:14:41 PM »
Hi,
you can also validate on the schematics:
TEBF0808 Schematic :
  • page 21 U16 MCLK_SDA/SCL goes to TEBF0808 SI5338 U35 (page 22)
  • page 21 U27 PLL_SDA/SCL goes to TEBF0808 B2B J2 (pages 4)
TE0808 Schematic :
  • page 2 J2 PLL_SDA/SCL goes to TE0803 SI5338 U5 (page 22)

br
John
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ziladdev

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Re: PLL clock generators (Module and Board)
« Reply #4 on: November 22, 2018, 11:11:18 AM »
JH,

While checking the zynqmp_fsbl source code, I can see you are configuring the U27 I2C switch in u32 XFsbl_BoardInit(void):
Code: [Select]
// TE Mod : 
    xil_printf("\r\n--------------------------------------------------------------------------------\r\n");
    xil_printf("TE0803 Board Initialisation\r\n");
    Status = i2c_init();                      // Configure I2C Bus 0 driver instance
    if (Status != XFSBL_SUCCESS) {
       xil_printf("Error:I2C Init\r\n");
       goto END;
    }
    Status = i2c_write(0x77, 0x00,  0x10);    // Configure I2C Switch
    if (Status != XFSBL_SUCCESS) {
       xil_printf("Error: Configure I2C Switch\r\n");
       goto END;
    }
    Status = si5338_init();                      // Configure clocks
    if (Status != XFSBL_SUCCESS) {
       xil_printf("Error: Configure SI5338 CLK\r\n");
       goto END;
    }
    XFsbl_TeReset();
    xil_printf("--------------------------------------------------------------------------------\r\n");
// TE Mod finished 

I am wondering why you are sending two bytes (0x00 and 0x10) while the DS of the I2C switch mentions only one register to write. My understanding is that it is enough to just send the one byte (0x10 = 1<<4) to select channel no 4.

Best regards,
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JH

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Re: PLL clock generators (Module and Board)
« Reply #5 on: November 22, 2018, 05:15:19 PM »
Hi,

tca9548a datasheet chapter 9.5.6.1 Writes:
Quote
....There is no limitation on the
number of data bytes sent in one write transmission....

so sometimes it's easer to reuse an existing function instead of creating an new one for only one case.

br
John

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