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After generate bitstream, What should do the next?

Started by jinyu, April 11, 2018, 03:32:05 PM

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   Need help , Now I have go through the  implementation, then generated the bitstream successfully , I don't konw what should  do the next. ,please give me

some  advice .

here is my procedure :

       1. click  File > export > export hardware
       2. click  File  > Launch SDK

       3.If there have  a Arty z7020 board then I should  use JTAG connect my hardward to my laptop

       4. In SDK , right click  zsys_wraper_hw_platform_0 > program FPGA

         is it right ? don't know much about fpga , any help would be appreciate

  best regards

Andrei Errapart

It looks like you're working on the HLS project.

The steps you did are not necessary. Please use the following TCL commands:

These commands generate the file "BOOT.BIN". You can find description of these commands at .

You can either use the prebuilt Petalinux image file "image.ub" or build your own customized version by following the instructions in .

Copy these two files to the SD card and boot the Arty Z7-20 from it. That's all.


Yes you are right. it is the HLS project ,thanks for your reply ,you have solved my problems .but Next step I want to transplant it on my  zedboard platform so I don't know if

the TCL command are works .

best regards



is nearly the same like press "Generate Bitfile" on Vivado GUI

is script based form of SDK: export HDF, open SDK, include local repository, generate applications, FSBL...Boot.bin
for Linux&Uboot you must use HDF with petalinux and generate this files with the template petalinux project. Use SDK to generate Boot.bin with FSBL, bitfile and uboot.elf.




  HI, John

    OK, I understand ;D 。 and I had installed the TCL command with your help .It will save a lot of time for me ~ thank you very much~

best regards