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Max1000 Configuration/Flashing

Started by blipton, February 16, 2019, 02:07:42 AM

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Following the Nios Lab tutorial, when I download the .sof and .elf, the program runs correctly.   When I Flash the FPGA with the .pof, the software does not run.. either because it's not in flash or in reset or something else..

In Qsys I verified 'Initialize Memory' is enabled, and it reports it will use nios_sys_onchip_ram.hex.    I tried converting the .elf to .hex (and renaming), and placing in the root FPGA project folder  (not \nios_sys\synthesis\submodules) before Synthesizing, but this did not work.   

So I'm a bit confused on how all the CFM0, CFM1, CFM2.. 256Kbits, 912Kbits, 1376Kbits options work.. I've got a few questions that hopefully someone can shed some light!   

1) The tutorial shows to set the FPGA device settings for 'Single Uncompressed Image with Memory Initialization (256Kbits UFM)'..   so why is the 'Generate compressed bitstreams' also enabled?   I assume the "Memory Initialization (256Kbits UFM)" is *NOT* the same as the Nios memory created in Qsys, so what does it refer to?

2) Is it possible for the Nios to flash a bitstream onto the Max10 directly, for the next power-on?   I assume the FPGA settings would have to be set for Dual Compressed Images (256Kbits UFM) so that you can run from one, while upgrading the other?   Is there a QSys peripheral that implements this internal interface?   

3) How could you choose the image to configure at power-on?  For example, if it always boots into one image, could the software set a pin and force a re-config to boot into the other?

4) Of all the Memory size options, is it possible to configure the fpga/nios to run out of one image, and use the other memory image space as a general purpose non-volatile memory for data?  (I don't plan on using the external SDRAM nor FLASH)