TE0820: dr_mode not found

[martin]

When loading the u-boot a few error message occurs.

First one is "ERROR: usb dr_mode not found"

The system-top.dts is

Code: [Select]

/dts-v1/;
/include/ "zynqmp.dtsi"
/include/ "zynqmp-clk-ccf.dtsi"
/include/ "pl.dtsi"
/include/ "pcw.dtsi"
/ {
chosen {
bootargs = "earlycon clk_ignore_unused";
stdout-path = "serial0:115200n8";
};
aliases {
ethernet0 = &gem3;
serial0 = &uart0;
spi0 = &qspi;
};
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
};

The usb0 part of the pcw.dtsi is

Code: [Select]

&usb0 {
status = "okay";
xlnx,usb-reset = <0x2faf080>;
};
The hole U-Boot messages are...

Code: [Select]

U-Boot 2017.01-dirty (Oct 17 2017 - 16:17:12 +0200) TE0820

I2C:   ready
DRAM:  1 GiB
ERROR: usb dr_mode not found

at /home/te0820/poky/build/tmp/work/te0820-poky-linux/u-boot-xlnx/v2017.01-xilinx-v2017.3+gitAUTOINC+da811c4511-r0/git/drivers/usb/common/common.c:32/usb_get_dr_mode()
EL Level:       EL2
Chip ID:        xczu2eg
MMC:   ** First descriptor is NOT a primary desc on 0:1 **
Card did not respond to voltage select!
sdhci@ff170000 - probe failed: -95
sdhci@ff160000: 0 (eMMC)Card did not respond to voltage select!


** Unable to use mmc 0:0 for loading the env **
Using default environment

In:    serial@ff000000
Out:   serial@ff000000
Err:   serial@ff000000
Bootmode: QSPI_MODE
Net:   ZYNQ GEM: ff0e0000, phyaddr ffffffff, interface rgmii-id

Warning: ethernet@ff0e0000 (eth0) using random MAC address - f6:95:30:57:3f:d5
eth0: ethernet@ff0e0000
Hit any key to stop autoboot:  0
zynqmp_qspi_ofdata_to_platdata: CLK 299999961
SF: Detected n25q256a with page size 512 Bytes, erase size 128 KiB, total 64 MiB
device 0 offset 0x100000, size 0x80000
SF: 524288 bytes @ 0x100000 Read: OK
device 0 offset 0x180000, size 0x1e00000
SF: 31457280 bytes @ 0x180000 Read: OK
Bad Linux ARM64 Image magic!
ZynqMP>
In Vivado 2017.3 -> Zynq Ultrascale+ IP -> Clock Configuration -> GT Lane Reference frequency -> USB0 is "Ref Clk3" with 100MHz
In Vivado 2017.3 -> Zynq Ultrascale+ IP -> I/O Configuration -> High Speed -> USB -> USB 0 -> USB 3.0 is enabled to "GT Lane0"

Hope somebody have me a hint what I can try next.

Thanks,
Martin

[JH]

Hi,
do you test with prebuilt files from reference design? Does it work?

• https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/TE0820/Reference_Design/2017.1/test_board

br
John

[martin]

Hi John,

with the BOOT.bin from the prebuild files "te0820-test_board-vivado_2017.1-build_04_20170821162153-1.zip\test_board\prebuilt\boot_images\te0820_2eg_1e\u-boot\" I get following output.

Code: [Select]

Xilinx Zynq MP First Stage Boot Loader
Release 2017.1   Aug 21 2017  -  13:29:14

--------------------------------------------------------------------------------
TE0820 Board Initialization
SI5338 Init Function
Si5338 Rev 1 Initialization             Done
Reset ETH is done.
Reset OTG is done.

--------------------------------------------------------------------------------
NOTICE:  ATF running on XCZU3EG/silicon v4/RTL5.1 at 0xfffea000, with PMU firmware
NOTICE:  BL31: Secure code at 0x0
NOTICE:  BL31: Non secure code at 0x8000000
NOTICE:  BL31: v1.3(release):7d1a673
NOTICE:  BL31: Built : 06:53:16, Aug 21 2017


U-Boot 2017.01 (Aug 21 2017 - 08:54:43 +0200) Xilinx ZynqMP ZCU102 revB

I2C:   Error, wrong i2c adapter 0 max 0 possible
Error, wrong i2c adapter 0 max 0 possible
ready
DRAM:  1 GiB
EL Level:       EL2
Chip ID:        xczu3eg
MMC:   sdhci@ff160000: 0 (eMMC), sdhci@ff170000: 1 (SD)
SF: Detected n25q256a with page size 512 Bytes, erase size 128 KiB, total 64 MiB
*** Warning - bad CRC, using default environment

Error, wrong i2c adapter 0 max 0 possible
Error, wrong i2c adapter 0 max 0 possible
In:    serial
Out:   serial
Err:   serial
Bootmode: QSPI_MODE
Net:   ZYNQ GEM: ff0e0000, phyaddr ffffffff, interface rgmii-id
eth0: ethernet@ff0e0000
U-BOOT for petalinux

I2C gets an error, but it seems that USB is working or ignored...

But know I see  you also using the ZynqMP ZCU102 rev B deconfig files to build u-boot

[JH]

Hi,

uboot i2c error can be ignored.

I2C is available on linux.

"ZynqMP ZCU102 rev B" is from petalinux generation. Xilinx petalinux used this as default template. Settings will be overwrite by HDF import, Device Tree and platform-top.h.

There is a petalinux template project on <reference design>/os/petalinux
Usage:

• https://wiki.trenz-electronic.de/display/PD/PetaLinux+KICKstart#PetaLinuxKICKstart-PetaLinux2017.1 

PS: I will upload 2017.2 design with wiki description tomorrow.
br
John

[JH]

Hi,
short info: TE0820 2017.2 Reference Design is online:

• https://wiki.trenz-electronic.de/display/PD/TE0820+Test+Board
• https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/TE0820/Reference_Design/2017.2/test_board

br
John

[martin]

Hi John,
thank you for the hint.
Is it enough to replace the board files or how can I update a existing project with the new settings?
Thanks,
Martin

[JH]

Hi,

depends on changes you has done on the design and what you need to update.
Did you change PS setting? Did you use Vivado Project with TE-Scripts or only Boart part files?

br
John

[martin]

Hi John,

no, I hadn't changed the PS settings.
And yes, I used the test_board 2017.1 with the TE scripts to generate the initial project.

Thanks,
Martin

[JH]

Hi,
best way is, add your changes from old project to new one.

But you can also try following:

• Make a backup copy of your project
• Open your Project with Vivado 2017.2 and use Vivado IP Upgrade Function.
• Save and close Vivado Project
• Replace "board_files" folder with new one from 2017.2 reference design
• Replace "console" folder with new one from 2017.2  reference design
• Replace "scripts" folder with new one from 2017.2  reference design
• Remove all bash files from main directory(_create_win_setup.cmd, and generated one like design_basic_settings.cmd....)
• Copy "_create_win_setup.cmd" from 2017.2 reference design into this folder
• Create Bash files with "_create_win_setup.cmd"
• Set correct board part on "design_basic_settings.cmd"
• run Bash files vivado_open_existing_project_guimode.cmd
• On Vivado Block Design:
• Remove PS IP
• Add new PS IP
• Run Board Automation and connect IPs, if not done
• Check one time, if PS is configured

br
John

[JH]

Hi,
 some note:

"dr_mode not found" for Vivado 2017.3 or newer.

Add:

Code: [Select]

&dwc3_0 {
  status = "okay";
  dr_mode = "host";
};to device tree.

2017.4 reference design for TE0820 is in process (will be come after TE0808,TE0807 and TE0803 update). Also special FSBL to program QSPI Flash, if boot mode is not JTAG.

br
John