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How to simulate the PWM IP Core in vivado

Started by jinyu, March 29, 2018, 05:15:50 PM

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jinyu

Hi,
   
   The VHDL language is too opaque to understand for me ,

   I want to use vivado to simulate the IP core in the folder IIot-EDDP/HLS/ARTY_Z7_FULL/ip_lib/ axis_pwm_1.0/hdl ,but I don't konw how to start and which document I

should read .
   
   Is anyone can give me the Necessary steps  to simulate aix_pwm_1.0 IP core  using vivado ?
 
  regards

JH

 Hi,
you find xilinx documentation for simulation here (if you want to use Vivado simulator):
You must wrote your own testbench for IP simulation.
br
John

jinyu


I understand,,,thank you. have a nice day !