Author Topic: Xilinx Artix-7 XC7A200T-2FBG484I ADC functionality  (Read 1272 times)

Varun

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Xilinx Artix-7 XC7A200T-2FBG484I ADC functionality
« on: April 30, 2018, 02:33:43 PM »
Hi,

I am using Xilinx Artix-7 XC7A200T-2FBG484I(TE0712) board and TE0701 carrier board for my project.

As per the Xilinx document, for 7 series board they have two sets of Analog inputs:
1) VP and VN
2) VAUXP[15:0] and VAUXN[15:0]

When see the schematic of TE0712 board, VP and VN are exposed but VAUXP/VAUXN  are not exposed.

We would like to VAUXP/VAUXN are connected to any I/O pins or those pins are not used in this board?

Regards,
Varun

JH

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Re: Xilinx Artix-7 XC7A200T-2FBG484I ADC functionality
« Reply #1 on: April 30, 2018, 02:59:38 PM »
Hi,
AUX Pins are labled as '_AD*' see:
Some are accessible (Bank 15 on schematics) some not (Bank 35 --> DDR) for example see page 5, 7:You must test, if you can use only some of them on the Xilinx IP:
br
John



Varun

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Re: Xilinx Artix-7 XC7A200T-2FBG484I ADC functionality
« Reply #2 on: April 30, 2018, 03:24:34 PM »
Hi John,

Thanks for the quick information.

Regards,
Varun