News:

Attention: For security reasons,please choose a user name *different* from your login name.
Also make sure to choose a secure password and change it regularly.

Main Menu

How do i write FPGA config data to SPI Flash memory

Started by sathishsn, August 21, 2017, 03:18:09 PM

Previous topic - Next topic

sathishsn

Hello Friends,

I am new to FPGA design.
I am creating base board for TE0711 FPGA module.

I want to store the FPGA configuration on built in SPI Flash memory of TE0711.
I am having JTAG port on my base Board. But the problem is that the JTAG connects only to FPGA not to the SPI Flash memory  :-X
How will i get the access to Flash memory of TE0711 module so that i could download my Bistream file ?

Any advice or reference is highly appreciated...

Best regards
Sathish

JH

Hi,

QSPI Flash is accessible over FPGA with same JTAG. You can use for example Vivado or SDK to configure Flash. Use as Flash type "s25fl256sxxxxxx0-spi-x1_x2_x4".

Here are some links to Xilinx documents for FPGA Programming:

br
John

sathishsn

Hello Dear John,

Thank you for the info.
The Board TE0711 i purchased has arrived.
From the schematics i see that SPI-DQ2 and SPI-DQ3 is pulled high 3.3V. I just want to make sure i doing the right thing.

Please let me know about the below question:
The memory configuration file for the Flash memory should be generated with option "SPIx1" or "SPIx2" ?

Best regards
Sathish

JH

Hello,

SPIx4 is possible on TE0711.

You must also add follinging contrains to the contrains file(xdc):

set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property BITSTREAM.CONFIG.CONFIGRATE 66 [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]
set_property CONFIG_MODE SPIx4 [current_design]
set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
set_property BITSTREAM.CONFIG.M1PIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.M2PIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.M0PIN PULLNONE [current_design]

This is missing on 2016.2 reference design of the TE0711. I will add this on the new Vivado 2017.2 design (i will generate this in the next weeks)

br
John

sathishsn

Hello Dear John,

I just wanted to let you know and thought it might help other community members who are looking for answers.

I couldn't get "SPIx4" working with the constraints as you mentioned.
However i had success with "SPIx2" with the following constraints:

set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]
set_property CONFIG_MODE SPIx2 [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 2 [current_design]

Best regards
Sathish

JH

Hi,
can you send me the logfile during mcs build process.
Add on this forum or send it to support@trenz-electronic.de
I will prefer the 2017.2 update of TE0711. I try to do this until next week.
br
John

JH

Hi, short info.

I can generate mcs with SPIx4. I will run final tests and generate prebuilt files for all assembly variants and create documentation during this week. After that i upload 2017.2 reference design.

If you need it faster, i can send you a preliminary version. Please write to  support@trenz-electronic.de if you need this.

br
John

sathishsn

Hello John,

Thank you for the info.
I completed my project.
It was medium size design and there was no specific requirement for generating the .mcs file with SPIx4 as constraint.

But once you are done uploading 2017.2 reference design, i would like to see the details how you achieved SPIx4.
or you could please send me e-mail: sathish.sulegai@yahoo.com

Best regards
Sathish

JH