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TE0820 Default Clock Generator configuration

Started by ignacio.moreno, November 08, 2017, 11:20:13 AM

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ignacio.moreno

Hi everyone,

I have a question regarding the module TE0820-02-03EG-1E3: has the clock generator on the module (SI5338) any default configuration? Unfortunately, I couldn't find this information at the TRM (https://wiki.trenz-electronic.de/display/PD/TE0820+TRM#TE0820TRM-ProgrammableClockGenerator).

I will use the TE0820 for an Embedded System with Linux and USB3.0. To enable USB3, I have to use a GT Lane with 100 MHz on the ZynqMP. For example, GT Lane 1 is clock 2 of the clock generator. I need to know if there is a default configuration because, if not, I have to modify my FSBL in order to program the generator with I2C. Unfortunately I cannot measure it with an oscilloscope because the generator is on the down side of the module.

Thanks in advance!

Regards
Ignacio

JH


ignacio.moreno

Hi John,

thanks for your quick answer!

Regards,
Ignacio