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Hardware target not detected Vivado 2017.2

Started by sathishsn, October 11, 2017, 02:08:07 PM

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sathishsn

Hello Dear Sir/Madam,

I am trying to connect via JTAG to TE0711 Board through the carrier Board i have designed.
I am using:
- Xilinx Vivado 2017.2 version
- Windows 10 OS
- Xilinx Platform cable USB II

When i click Hardware manager-> Open target, the localhost(0) is detected but not the FPGA device.
The Green light on the "Platform Cable USB II" is ON, The Green light on Trenz Board is ON.

Any tips and suggestions to resolve this issue would be very helpful to me..

Best regards
Sathish

JH

Hi,

which carrier did you use? How did you connect JTAG?

br
John

sathishsn

In the Carrier Board PCB which i have designed there is a 9-pin JTAG connector. I have mapped TCK, TDI, TDO and TMS from JM2 connector of Trenz Board. Also 3.3 Volts is connected to the Vref pin. GND pin is grounded as part of the PCB design.

Best regards
Sathish

JH


sathishsn

Hello Dear John,

The 9-pin connections are as follows:
1 - TMS - JM2-93
2 - NC
3 - TDI - JM2-95
4 - TDO - JM2-97
5 - NC
6 - TCK - JM2-99
7 - NC
8 - GND
9 - VCC

JTAG_SEL pin JM1-89 is GND

Best regards
Sathish

JH

Hello,

can you tell me pin connections referred to:
https://www.xilinx.com/support/documentation/data_sheets/ds593.pdf
page 15 Figure 15:
2 -VREF <->JM2-91(3.3V)
8-TDO   <- JM2-97
10-TDI  -> JM2-95
4-TMS   -> JM2-93
6-TCK   -> JM2-99
GND <-> GND

Is this correct so?

Did you check power of the boards? Did the module starts?

br
John

sathishsn

Hello Dear John,

I used older Xilinx Vivado version 2014.4 with Windows 7 and it is working now without any issues. The FPGA target is detected and am able to download the .bit file.

Best regards
Sathish