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turn on MGT reference clock to TE0741

Started by WallyG, July 19, 2017, 12:33:40 PM

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According to the TE0741 Wiki table 7 here ( ), the TE0741 FPGA gets 3 clocks from a Si5338 clock generator:

2 x 125 MHz MGT reference clocks + 1 x 100 MHz clock.

From my measurements, 125MHz CLK2 to FPGA bank 115 is Off.

How do I turn it On?

(The second 125MHz clock to bank 116, and the 100MHz are o.k. (on))

thanks for any help



at the moment we have no example design online for TE0741, which configure the SI5338.
Here the main steps:

  • Download SI5335 ClockBuilder Desktop from SiLabs
  • Create lockBuilder Desktop  Project with settings from Schematic/TRM and your preferred clk setting
  • Export C header File with configuration
  • Integrate  MircoBlaze MCS Design in your Vivado project with GPIO connected to I2C Pins of Si5338
  • Create App which configures Si5338 (See code from TE0841)

We have a example for TE0841 online, you can check code there:



Thank you for helpful feedback John

Two things occur :

1. Does that mean the Trenz Wiki Table 7 and Fig 3 are indeed wrong and "MGT CLK2" is not working ? ( ),

2. I get the general idea of reprogramming the SI5335 thru' I2C.
I'm puzzling over how to use the FPGA to do the re-programming however.
On the TE0741 the SI5335 itself supplies the 100MHz FPGA system clock.
Does this create a "catch22" ? (= When the FPGA resets the SI5335 during reconfiguration, the system clock to the FPGA will disappear, and further I2C commands won't be sent...)

thanks for any assistance


this is disabled by default firmware. Can be enabled over I2C.
2: Use Startup Primitive for MCS CLK, with this you can get access to appr. 65MHz configuration clk.
IP for 7 Series is included in:
--> led_vio\ip_lib\PRIM_STARTUP