Arduzynq power pins and ethernet

[z1990]

Hallo,
I want to ask about the best possibility to transfer data from/to the Arduzynq PS (about 100MB) is it possible with some extra equipment/chips to setup an ethernet connection with the module or not ? (Ethernet is prefered over the other possibilities)

second question : if I want to power the board "not" from the USB but over pins, which pins are for that available and which voltage level is required ?

Thanks in Advance

[JH]

Hello,

USB is implemented on reference design, so you can easy use USB stick. For small date, UART or JTAG is also possible.

• https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/TE0723/Reference_Design/2016.4/test_board

There is no ETH Phy on TE0723, so you must connect one to the board. Use MII to RGMII on Vivado for PL innterface and loc the externel pins to the available Pinheader Pins. But you must check on schematic, if this is possible with the available User IOs from PL and try.


TE0723 use JTAG USB 5V for all power, if this is not connected, you can supply PCB over 5V Pin. All others will be generated from this.
See (Page 12):

• https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/TE0723/REV03/Documents
• https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/TE0723/REV03/Documents/SCH-TE0723-03M.PDF

br
John

[z1990]

Thank your very much for the info, do you think it make sence to get the Zynqberry if I am plannning to use an Ethernet connection ?
I think this would be better because I am planning a "product" and this needs really a stabile connection.

are the Zynqberry 26 I/O's connected to the FPGA like the 23 Pins in the Arduzynq ?

Thanks again

[JH]

Hi,
yes ETH is available on ZynqBerry (ETH over USB interface).
ZynqBerry Documentation and Links to Download (Schematics, Reference Designs):

• https://wiki.trenz-electronic.de/pages/viewpage.action?pageId=24151598

• https://wiki.trenz-electronic.de/display/PD/TE0726+TRM#TE0726TRM-BlockDiagram
• https://wiki.trenz-electronic.de/display/PD/TE0726+TRM#TE0726TRM-FPGAIOBanksPinMapping

What do you men with "like Aduzynq"? The same Pins, so that you can use same constrain files? No

br
John

[z1990]

Okay, so as I see these 26 pins are directly connected to the chip without buffering or something like that ?

I am asking because I am designing a Trigger functionality and I should make sure that these pins could be readed directly from the PL side without any type of buffering or so ...

Thanks again for your time

[JH]

Hi,

yes directly connected. IO Bank power 3.3V. There are 2 MIO for I2C on GPIO connector.

If you would like use TE0726 instead of TE0723, please use a assembly variant with 512MB. It's much better, when you use OS on Zynq.

br
John