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Trenz Module Output Voltages

Started by jferment, May 24, 2017, 04:31:29 PM

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jferment

We are currently using a TE808 module.  I have noticed that there are output pins for different voltage rails.

For example PS_1V8 and PL_1V8 are outputs from the module.  Is the intention that those supply rails can be used on carrier card or used to power the VCCIO of an FPGA bank?

Forgive me but I can't find any information on these signals and why they are there?

Thanks


JH

Hi,

new TE0808 TRM version is in process.
At the moment, we have the following information available(short description on wiki and schematics on download area):
You can use our carrier schematics to check basic necessary connections for the module.

VCCO to FPGA Banks are inputs on the B2B connector. They must supply from carrier, you can use  1V8V outputs or own voltage regulator to do this. Attention max. voltage for HP is 1.8V. Also drive io pin only if core and bank voltage is on, see:


Here are some overviews to power from preliminary draft of the next TE0808 TRM (you should verify with schematics, this is only overview):

On the TE0808-03 SoM, following Power Domains can be powered up individually with power rails available on the B2B connectors:

    Full-Power Domain, supplied by power rail 'DCDCIN'
    Low-Power Domain, supplied by power rail 'LP_DCDC'
    Programmable Logic, supplied by power rail 'PL_DCIN'
    Battery Power Domain, supplied by power rail 'PS_BATT'

Power Distribution Dependencies

The power rails 'DCDCIN', 'LP_DCDC', 'PL_DCIN', 'PS_BATT' have to be powered up on the assigned pins of the B2B connectors as listed on the section "Power Rails". Except 'PS_BATT' (see section "Recommended Operation Conditions"), all power-rails can be powered up, with 3.3V power sources, also shared, if Power Domain control is not used.

There are following dependencies how the initial voltages of the power rails on the B2B connectors are distributed on the on-board DCDC converters, which power up further DCDC converters and particular on-board voltages:

    DCDCIN
        -->TPS82085SIL (U23, 1.0V at 3A) → PS_GT_1V0
            -->TPS74801DRC (U8, 0.9V at 1.5A) → PS_AVCC
        -->TPS82085SIL (U30, 0.85V at 3A) → FP_0V85
        -->TPS82085SIL (U24, 2.5V at 3A) → DDR_2V5
        -->TPS82085SIL (U31, 1.2V at 3A) → DDR_1V2
        -->TPS51206DSQ (U18, 2A Peak Sink / Source current) → VREFA, VTT



    LP_DCDC
        -->TPS82085SIL (U20, 2.0V at 3A) → DCDC_2V0
            -->TPS74801DRC (U10, 1.8V at 1.5A) → PS_AVTT
            -->TPS72012DRVR (U26, 1.2V at 0.35A) → PS_PLL
            -->TPS72018DRVR (U27, 1.8V at 0.35A) → PS_AUX
            -->TPS72018DRVR (U34, 1.8V at 0.35A) → DDR_PLL
            -->TPS72018DRVR (U6, 1.8V at 0.35A) → AUX_R
            -->TPS72018DRVR (U16, 1.8V at 0.35A) → AUX_L
        -->TPS82085SIL (U29, 0.85V at 3A) → LP_0V85
        -->TPS82085SIL (U15, 1.8V at 3A) → PS_1V8



    PL_DCIN
        -->EN63A0QI (U4, 0.85V at 12A) → PL_VCCINT
        -->TPS82085SIL (U19, 1.8V at 3A) → PL_1V8



    GT_DCDC
        -->TPS82085SIL (U21, 1.35V at 3A) → PL_GT_1V35
            -->TPS82085SIL (U28, 1.2V at 3A) → AVTT_R
        -->TPS82085SIL (U22, 1.05V at 3A) → PL_GT_1V05
            -->TPS82085SIL (U14, 0.9V at 3A) → AVCC_R
        -->TPS82085SIL (U35, 1.35V at 3A) → PL_GT2_1V35
            -->TPS82085SIL (U13, 1.2V at 1.5A) → AVTT_L
        -->TPS82085SIL (U36, 1.05V at 3A) → PL_GT2_1V05
            -->TPS82085SIL (U11, 0.9V at 1.5A) → AVCC_L
        -->TPS82085SIL (U38, 1.8V at 3A) → SI_PLL_1V8

You found also a picture with basic TE0808 power sequencing diagram with user-enable and power good signals from B2B-connector on the attachment.



br
John