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Custom Carrier Board for TE0712 - All Voltage/Power out pins at 0V

Started by spr, April 22, 2017, 07:30:09 PM

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spr

Hello,

We have designed a custom carrier board for TE0712 module. However, we seem to have run into some weird problem : The output power/voltage pins like PWR_M1, PWR_M2, PWR_M3, JTAG_VREF all seem to be 0V. However, the TE0712 module itself seems to have booted up properly, as the LEDs (red/green) by default are toggling fine (as I have seen this behavior with standard TE carrier module TE0701 as well). Further, Vivado is able to detect the Artix 7 FPGA over JTAG and we are also able to program it (the Vref of the actual JTAG connector is connected directly from an external 3.3V, not from TE module, and probably the reason why JTAG is working). 

Also, as per the exported spreadsheet from Vivado Hardware Manager, the FPGA core voltage, 1.8V, 3.3V etc seems to be fine. So, the only problem (for now) seems to be the output power pins stuck at 0V. Kindly let me know what could possibly cause this issue ? FYI, we have left the Mode and EN1 pins open. Any help would be greatly appreciated !

Thanks,
Raju


JH

Hello,

EN1 has pullups, so it's OK to be floating. But Pullups for this and some other enable signals are connected to 3.3VIN
3.3V from PWR_M1 is the same as PWR_JTAG (See Schematic page 2), so if you use externel power suplly for PWR_JTAG, you also source all other Voltages, depending on 3.3V.

3.3V is 3.3VIN (see Sch. page 15) over power switch. You must source this on Carrier  B2B Pin JB1-14,-16 -> PWR_2 (On Module side it's JM1-13, -15). Is 3.3VIN available on your Carrier?
This will be enabled, if 1.0V and 1.8V are Ok (See Sch. page 15).

TE0712 Schematic (you can also use the schematic from your assembly option on download area):

See also TE0712 TRM:

br
John

spr

Thanks for the reply !

Yes, 3.3 V is available on our carrier board and the voltage is accurate as well. We have sourced all Vin and 3.3Vin pins of the TE module from a single 3.3 V supply.

Is there a possibility that this could be a power up issue ? Because some voltages as reported by the FPGA which is read back from Vivado Hardware Manager seems to be correct. I have attached the exported spreadsheet from vivado. We see that VCCAUX (1.8V), VCCBRAM(1.0V), VCCINT(1.0V) are correctly reported, whereas all other voltages VCCO_DDR, VCCPAUX, VCCPINT, VP_VN, VREFN, VREFP are all 0V.  However, even though the FPGA is reporting VCCAUX as 1.8 V, we see nothing on the PWR_M2 pin which is essentially the same 1.8 V. So, I am a bit skeptical of this vivado reported voltage values. Is this even reliable and does it really report the present measured voltage values ?

Further, we have also sourced the I/O bank voltages VCCIO13, VCCIO15 and VCCIO16 from the same 3.3 V supply which is used to source the Vin and 3.3Vin at power on. I remember reading somewhere that the i/o bank voltages should only be supplied after the TE module asserts PGood high, but we are not following this. Could this be the cause of this issue ?

Also, in the schematics of the TE0712 I see there are some test points. Is there any document, which contains details about where exactly they are located and how they could be accessed on the TE0712 pcb ?

Thanks once again !

Regards,
Raju



JH

Hi,

i've put interactive 3DPDF to download, should be available in appr. 1h. You can easy highlight test points there. They are also include in the AD PDF but it's not so good to find out where. But the most are on bottom side.

I think some of the voltages should be there, otherwise the FPGA do no work. Maybe some of the power good signals do are down, you should check this.
It's also possible to send us your schematics, so i can check it. You can send it to support@trenz-electronic.de

Power Good indicates, that all module voltages are ready. IFPGA Core voltages should be ready before io banks are powered. See also Xilinx documentation. But at the moment, i think this should be not your problem.

br
John

spr

Hi John,

I have sent screenshots of our custom carrier board schematic to the email address you specified. It would be great if you could check them and let me know if you find any obvious mistakes/issues.

Regards,
Raju 

JH

Ok,
I will check and let you know if i find out something.
br
John

spr

It turns out that the source of this problem was the mechanical interconnection issue between the samtec connectors of the carrier board and TE module...since, some voltages were available on TE module and some not (and no voltage at all on the carrier), we were always thinking that this was a schematic/board design/soldering issue...but, in the end it was just a mechanical issue and has been solved for now..

Anyway, thanks for your continued support without which we couldn't have identified the source of this issue ! we really do appreciate it !!