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TEBF0808 HDF Files with XSDK 2016.2 / 2016.3

Started by koju155, December 16, 2016, 12:04:37 PM

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koju155

I worked with the HDF Files for the TE0808 from your Download Site:

The file from 2016.2 worked perfectly and I got the board running, however the hdf file for the version 2016.3 didn't work at all. I noticed, that even the README files have mistakes:

In os/petalinux/README.txt there are instructions for petalinux 2016.2 and the bootloader patches are for the TE0911 board.

Now I wonder if there is a correct hdf file for TEBF0808 for SDK 2016.3 or if I have done something wrong.

JH

Hi,

the readme is a copy past mistake. There is also a problem with PCIe on this reference design. There will be a update for vivado 2016.3 next week, that will fixed that. We will be also include the SDK-FSBL template with SI534 initialisation.

You can generate your own HDF from Vivado Design.

What's your problem with 16.3? Can you tell me your TEBF0808 and your TE0808 revision number.

br
John

koju155

Where can I find the revision number?

When I build fsbl or pmufw through SDK2016.3 with SDK2016.3 HDF File I can't boot.
With 2016.2 it works: I can boot U-Boot and Linux.

JH

Revision number is printed on the PCB. Or your order number. For example TEBF0808-04

You can try this design:
https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/TE0808/Reference_Design/2016.3/Carrier_TEBF0808_IBERT

This includes modification for Si5345 for SDK template. But some PS periphery are disabled on this reference design.

br
John

koju155

Our board is "TEBF0808-03".

So do I have to try the *-IBERT files?

JH

I mean, you can test your application with the HDF from the IBERT project. We also upload a new version of the TEBF0808 reference design, which include a FSBL temple with SI5345 initialization (include SDK repository: https://wiki.trenz-electronic.de/display/PD/SDK+Projects ).

Did you use PetaLinux, or some another Linux distribution? Boot the System with the prebuilt Linux image and boot.bin? Did you see some messages on console, or is nothing happens after reboot?
For Linux, we used Petalinux build environment to build the FSBL and Boot.bin. At beginning there was some problems to boot UBoot from SD with the FSBL generated by SDK. Currently we did not try this again.

br
John



koju155

#6
I used Xilinx SDK (Eclipse) to build FSBL.

This is the bootlog, which I receive by the FSBL:

       ▒▒▒@Xilinx Zynq MP First Stage Boot Loader
Release 2016.3   Dec 20 2016  -  11:15:14
Platform: Silicon (1.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU9EG
Processor Initialization Done
================= In Stage 2 ============
SD1 Boot Mode
SD: rc= 0
File name is BOOT.BIN
Multiboot Reg : 0x0
Image Header Table Offset 0x8C0
*****Image Header Table Details********
Boot Gen Ver: 0x1020000
No of Partitions: 0x4
Partition Header Address: 0x280
Partition Present Device: 0x0
Initialization Success
======= In Stage 3, Partition No:1 =======
UnEncrypted data Length: 0x189992
Data word offset: 0x189992
Total Data word length: 0x189992
Destination Load Address: 0xFFFFFFFF
Execution Address: 0x0
Data word offset: 0x7EF0
Partition Attributes: 0x20
Destination Device is PL, changing LoadAddress
Bitstream download to start now
DMA transfer done
PL Configuration done successfully
Partition 1 Load Success
======= In Stage 3, Partition No:2 =======
XFSBL_ERROR_ADDRESS: FFFE5000
Partition 2 Load Failed, 0x2E
================= In Stage Err ============
Fsbl Error Status: 0x0



Regarding the prebuilt images: There seem to be none for the IBERT files ...

The prebuilt BOOT.bin for U-Boot from the normal TEBF0808 downloads, however, is working

JH

Hi,

it seems, that the address is not accessible by the processor.  Can you show me your *.bif content, which you has used for the Boot.bin.
I found something to this Error Message of the FSBL: https://forums.xilinx.com/t5/Embedded-Development-Tools/Multi-core-in-BOOT-bif-how-to/td-p/699312

Did you download this zip for IBERT design: http://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/TE0808/Reference_Design/2016.3/Carrier_TEBF0808_IBERT/TE0808-TEBF0808_IBERT-vivado_2016.3-build_02_20161205094019.zip
There is a prebuilt *.hdf in the subfolder: \prebuilt\hardware\TE0808_ES1

br
John



koju155

I have found that Topic, too. But I did not really know what to do as there are no Offsets or similar in the *.bif file:

//arch=zynqmp; split = false; Format = BIN
the_ROM_image:
{
   [fsbl_config]a53_x64
   [bootloader]/path/to/fsbl.elf
   [destination_cpu = a53-0]/path/to/uboot.elf
}


I have attempted various combinations with PMUFW, ARM Trusted Firmware and Bit Stream.
But since it fails already at FSBL this is probably not the Problem.

For the 2016.2 FSBL this configuration is working btw.

JH

Can you start FSBL with SDK Debugger, to see where the booting exactly crashed.

Did you use the default FSBL template and generated BSP or did you modify something?

The address XFSBL_ERROR_ADDRESS: FFFE5000 is a part of the OCM Address range 0xFFFC_000 to 0xFFFF_FFFF. See UG1137 page 13 figure 2-2 ( https://www.xilinx.com/support/documentation/user_guides/ug1137-zynq-ultrascale-mpsoc-swdev.pdf )

Can you test it with a simple hello world example instead of your uboot.

br
John

koju155

#10
I did not modify anything (except Setting the DEBUG flag of course).

Is there a guide how to debug the FSBL? I don't know how to ...


EDIT: A simple Hello World is working with the FSBL ...

JH

Hi,

Hello World will be written to DDR instead of OCM by default. I think Uboot should be also load to the DDR by FSBL. Maybe that's the problem.
How did you generate your u-boot? Maybe there there is a problem with your linker script.
Can you try the uboot.elf of our prebuilt instead.
And you should also use our FSBL template with SI5345 initialization to start all necessary reference clks (But this is currently not your problem).

Debugging: See Xilinx Documentation or https://wiki.trenz-electronic.de/display/PD/SDK+Projects    (link from the Post at 08:59:50 AM)
For TEBF0808 you must also set the Boot Mode to JTAG--> See https://wiki.trenz-electronic.de/display/PD/TEBF0808 and https://wiki.trenz-electronic.de/display/PD/MPSoC+Debug

br
John

koju155

The same U-Boot is working with FSBL created with the HDF File from 2016.2. I did the same twice except picking two different hdf files as Basis for the BSP in the SDK.

JH

I ask how did you generate uboot? From where did you get your uboot?
Can you please try the generated uboot from petalinux, which we have provide in the prebuilt folder of the reference design.

Xilinx has change a lot of setting between Vivado 2016.2 and 2016.3. Maybe your uboot version is not compatible with the new SDK-FSBL.

br
John

koju155

I use Yocto Project.
If you say there are changes done in U-Boot, will I find the changes made to U-Boot in the files from petalinux? (config, platform-top.h and platform-auto.h in os/petalinux/Subsystems/Linux/configs/u-boot)

JH

At first, please try our provided uboot. If it's start, you search for changes. I tried it and it works on my place.

How did your Yocto project get the information from Zynq-PS, for example RAM-Size? Did it use also the HDF form 2016.3 project.

PetaLinux Uboot generation use  config, platform-top.h and platform-auto.h, also device tree and other petalinux configs. And sometimes Xilinx Software use "zcu102" in some strings to become the correct settings. UltraScaleMPSoC is currently ES!

br
John