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TE0715+TE0703

Started by xzsawq21, November 11, 2016, 11:46:47 AM

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xzsawq21

Hello
I'm newbie to FPGA
I want to order TE0715+TE0703 and build an AD/DA daughter card. so I have many questions.

*first question is it necessary to buy two 5V supply adapter to supply TE0715+TE0703? or one  5V supply adapter is enough?

*TE0715-04-15-2I has -2 speed grade and TE0715-04-30-1I has -1 speed grade. for what TE0715-04-30-1I is more expensive than TE0715-04-15-2I?

*I downloaded TE0703 schematic file but there are lot of pins that some of them connected to FPGA directly and some of them connected to CPLD... I'm confused... when I'm designing an AD/DA daughter card is it necessary to pay attention which pins is free from CPLD and connected directly to FPGA?

*I'm very concerned about the SNR of my AD/DA card (70dB or more). could you please prepare a trace-length document for TE0703?

* my AD/DA daughter card needs a clean 65MHz clock. can I produce a clean clock from your board and connect the clock to my ADA card through one of TE0703 pins?
(similar to Red Pitaya)

*TE0703 has two male VG96 connectors. so my ADA card needs two female VG96 connectors... is there a suitable female VG96 connector for my ADA card?


Regards

Thorsten Trenz

Hi,
Quote from: xzsawq21 on November 11, 2016, 11:46:47 AM
*first question is it necessary to buy two 5V supply adapter to supply TE0715+TE0703? or one  5V supply adapter is enough?

You need one powersupply, TE0715 will be supplied from TE0703

Quote from: xzsawq21 on November 11, 2016, 11:46:47 AM
*TE0715-04-15-2I has -2 speed grade and TE0715-04-30-1I has -1 speed grade. for what TE0715-04-30-1I is more expensive than TE0715-04-15-2I?

TE0715-04-30-1I has much larger FPGA.

Quote from: xzsawq21 on November 11, 2016, 11:46:47 AM
*I downloaded TE0703 schematic file but there are lot of pins that some of them connected to FPGA directly and some of them connected to CPLD... I'm confused... when I'm designing an AD/DA daughter card is it necessary to pay attention which pins is free from CPLD and connected directly to FPGA?

Please do not use the CPLD pins, only the FPGA pins. The CPLD can be used as IO extender with special bitfile, but this is currently not supported.

Quote from: xzsawq21 on November 11, 2016, 11:46:47 AM
*I'm very concerned about the SNR of my AD/DA card (70dB or more). could you please prepare a trace-length document for TE0703?

This is currently not available. You'll find complete Altium Project, as well as gerber data here:
https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/carrier_boards/TE0703/REV04/HW_Design

Quote from: xzsawq21 on November 11, 2016, 11:46:47 AM
* my AD/DA daughter card needs a clean 65MHz clock. can I produce a clean clock from your board and connect the clock to my ADA card through one of TE0703 pins?
(similar to Red Pitaya)

No. You will need a low jitter PLL on your base.

Quote from: xzsawq21 on November 11, 2016, 11:46:47 AM
*TE0703 has two male VG96 connectors. so my ADA card needs two female VG96 connectors... is there a suitable female VG96 connector for my ADA card?

https://shop.trenz-electronic.de/de/25190-VG96-Steckerleiste-Vertikal-TE-Connectivity-DIN41612

You can also use normal 2.54mm  headers.

For your application, it would be better to place TE0715 directly on your base, there is no need for the TE0703. We can easily design and manufacture such a board for you. Please contact us via email if you are interested in this.

Best Regards,
Thorsten Trenz