stall in clean build Linux boot on TE0720-03-2IF

[danwwright]

I used the TE0720_2IF board file in the 2016.2 reference design and built a system on the 2016.2 Vivado and then exported from that an .hdf and made a new petalinux project:

petalinux-create --type project --template zynq --name VBase8Linux
cd VBase8Linux
petalinux-config --get-hw-description=hw-description
petalinux-build -x distclean
petalinux-build
petalinux-package --force --boot --fsbl images/linux/zynq_fsbl.elf --u-boot

I made no changes to the kernel config that gets generated.  But when I boot this on my TE0720-03-2IF I get just:


U-Boot 2016.01 (Sep 10 2016 - 14:49:22 -0700)

DRAM:  ECC disabled 1 GiB
MMC:   sdhci@e0100000: 0, sdhci@e0101000: 1
SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   ZYNQ GEM: e000b000, phyaddr -1, interface rgmii-id
eth0: ethernet@e000b000
U-BOOT for VBase8Linux

ethernet@e000b000 Waiting for PHY auto negotiation to complete...... done
BOOTP broadcast 1
DHCP client bound to address 192.168.1.107 (3 ms)
Hit any key to stop autoboot:  0
Device: sdhci@e0100000
Manufacturer ID: 3
OEM: 5344
Name: SL64G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 59.5 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
reading image.ub
6100316 bytes read in 540 ms (10.8 MiB/s)
## Loading kernel from FIT Image at 10000000 ...
   Using 'conf@1' configuration
   Verifying Hash Integrity ... OK
   Trying 'kernel@1' kernel subimage
     Description:  PetaLinux Kernel
     Type:         Kernel Image
     Compression:  gzip compressed
     Data Start:   0x100000f0
     Data Size:    6083538 Bytes = 5.8 MiB
     Architecture: ARM
     OS:           Linux
     Load Address: 0x00008000
     Entry Point:  0x00008000
     Hash algo:    crc32
     Hash value:   b54b1fd6
   Verifying Hash Integrity ... crc32+ OK
## Loading fdt from FIT Image at 10000000 ...
   Using 'conf@1' configuration
   Trying 'fdt@1' fdt subimage
     Description:  Flattened Device Tree blob
     Type:         Flat Device Tree
     Compression:  uncompressed
     Data Start:   0x105cd5a8
     Data Size:    15479 Bytes = 15.1 KiB
     Architecture: ARM
     Hash algo:    crc32
     Hash value:   4261ca3d
   Verifying Hash Integrity ... crc32+ OK
   Booting using the fdt blob at 0x105cd5a8
   Uncompressing Kernel Image ... OK
   Loading Device Tree to 07ff9000, end 07fffc76 ... OK

Starting kernel ...

Booting Linux on physical CPU 0x0
Linux version 4.4.0-xilinx (dwright@dwright-Macmini) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #2 SMP PREEMPT Sat Sep 10 14:49:54 PDT 2016
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine model: VBase8Linux
bootconsole [earlycon0] enabled
cma: Reserved 16 MiB at 0x3f000000
Memory policy: Data cache writealloc
PERCPU: Embedded 12 pages/cpu @ef7d2000 s19264 r8192 d21696 u49152
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 260608
Kernel command line: console=ttyPS0,115200 earlyprintk
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 1013244K/1048576K available (4840K kernel code, 218K rwdata, 1772K rodata, 2696K init, 214K bss, 18948K reserved, 16384K cma-reserved, 245760K highmem)
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
    vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)
    lowmem  : 0xc0000000 - 0xf0000000   ( 768 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .text : 0xc0008000 - 0xc067d3dc   (6613 kB)
      .init : 0xc067e000 - 0xc0920000   (2696 kB)
      .data : 0xc0920000 - 0xc0956920   ( 219 kB)
       .bss : 0xc0956920 - 0xc098c37c   ( 215 kB)
Preemptible hierarchical RCU implementation.
        Build-time adjustment of leaf fanout to 32.
        RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
NR_IRQS:16 nr_irqs:16 16
slcr mapped to f0802000
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at f0802100
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
timer #0 at f080a000, irq=17
Console: colour dummy device 80x30
Calibrating delay loop... 1332.01 BogoMIPS (lpj=6660096)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x82c0 - 0x8318
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 processors activated (2664.03 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor ladder
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xf0880000
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized

... and here it hangs forever.

Is this a known issue?

[JH]

Hi,

normally it should work. It seems you have some problems with drivers.  Did you use petalinux 2016.2 or 2016.1? PetaLinux should be used in same version like vivado.
In the subfolder "/os/petalinux" is a predefined petalinux project with settings for Ethernet,USB and RTC. Can you try this? We had generated the project with the steps descriped here: https://wiki.trenz-electronic.de/display/PD/PetaLinux+KICKstart
We used SDK/HSI to generate fsbl and boot.bin, otherwise that are the same steps, like yours.
We have also provided a prebuilt Boot.bin and image.ub in the subfolder /prebuilt.
BR
John

[danwwright]

Thanks.  After some experimentation I discovered that the problem in booting was due to an addition to the device tree that must have been generated by the import of the .hdl from my Vivado design.  Here's what was added to my pl.dtsi:

/*
* CAUTION: This file is automatically generated by Xilinx.
* Version: HSI 2016.2
* Today is: Mon Sep 12 07:39:40 2016
*/


/ {
   amba_pl: amba_pl {
      #address-cells = <1>;
      #size-cells = <1>;
      compatible = "simple-bus";
      ranges ;
      axi_dma_0: dma@40400000 {
         #dma-cells = <1>;
         compatible = "xlnx,axi-dma-1.00.a";
         interrupt-parent = <&intc>;
         interrupts = <0 29 4>;
         reg = <0x40400000 0x10000>;
         dma-channel@40400000 {
            compatible = "xlnx,axi-dma-mm2s-channel";
            dma-channels = <0x1>;
            interrupts = <0 29 4>;
            xlnx,datawidth = <0x20>;
            xlnx,device-id = <0x0>;
         };
      };
      axi_dma_1: dma@40410000 {
         #dma-cells = <1>;
         compatible = "xlnx,axi-dma-1.00.a";
         interrupt-parent = <&intc>;
         interrupts = <0 30 4>;
         reg = <0x40410000 0x10000>;
         dma-channel@40410000 {
            compatible = "xlnx,axi-dma-mm2s-channel";
            dma-channels = <0x1>;
            interrupts = <0 30 4>;
            xlnx,datawidth = <0x20>;
            xlnx,device-id = <0x1>;
         };
      };
      axi_dma_2: dma@40420000 {
         #dma-cells = <1>;
         compatible = "xlnx,axi-dma-1.00.a";
         interrupt-parent = <&intc>;
         interrupts = <0 31 4>;
         reg = <0x40420000 0x10000>;
         dma-channel@40420000 {
            compatible = "xlnx,axi-dma-mm2s-channel";
            dma-channels = <0x1>;
            interrupts = <0 31 4>;
            xlnx,datawidth = <0x20>;
            xlnx,device-id = <0x2>;
         };
      };
      axi_gpio_0: gpio@41200000 {
         #gpio-cells = <2>;
         #interrupt-cells = <2>;
         compatible = "xlnx,xps-gpio-1.00.a";
         gpio-controller ;
         interrupt-controller ;
         interrupt-parent = <&intc>;
         interrupts = <0 32 4>;
         reg = <0x41200000 0x10000>;
         xlnx,all-inputs = <0x0>;
         xlnx,all-inputs-2 = <0x1>;
         xlnx,all-outputs = <0x1>;
         xlnx,all-outputs-2 = <0x0>;
         xlnx,dout-default = <0x00000000>;
         xlnx,dout-default-2 = <0x00000000>;
         xlnx,gpio-width = <0x20>;
         xlnx,gpio2-width = <0x20>;
         xlnx,interrupt-present = <0x1>;
         xlnx,is-dual = <0x1>;
         xlnx,tri-default = <0xFFFFFFFF>;
         xlnx,tri-default-2 = <0xFFFFFFFF>;
      };
      axi_uartlite_0: serial@42c00000 {
         clock-names = "ref_clk";
         clocks = <&clkc 0>;
         compatible = "xlnx,xps-uartlite-1.00.a";
         current-speed = <115200>;
         device_type = "serial";
         interrupt-parent = <&intc>;
         interrupts = <0 33 1>;
         port-number = <1>;
         reg = <0x42c00000 0x10000>;
         xlnx,baudrate = <0x2580>;
         xlnx,data-bits = <0x8>;
         xlnx,odd-parity = <0x0>;
         xlnx,s-axi-aclk-freq-hz-d = "50.0";
         xlnx,use-parity = <0x0>;
      };
   };
};

All of that DOES correctly describe IP blocks added to my Vivado design but for some reason their presence in the device tree was causing the kernel to hang.

[Antti Lukats]

you should NOT modify the auto generated files!!!!!

never,

please overwrite the portions you need in top level dts only, this is the correct way, not editing automatically generated dts files!

[danwwright]

Sure- what I did was only an experiment.  The likely cause of the error was that my Vivado project was designed anticipating that the TE0720 would be plugged into our own custom board (which is not yet available) and I was attempting to boot up with the TE0720 plugged into a TE0703.  Hopefully once our own board is ready I should be able to restore the the device tree to exactly what was generated from out .hdl file.

[danwwright]

FYI I eventually discovered why I needed to remove all register descriptions in the FPGA fabric from my device tree to permit boot to succeed.   I had assumed (incorrectly) that if I simply checked the "include bitstream" box in the export hardware dialog in Vivado then I would have this bitstream included automatically in the BOOT.BIN that peralinux would create using that .hdf file generated by Vivado.  That is not true.  You also need to include it on the petalinux-package command line like so:

petalinux-package --force --boot --fsbl images/linux/zynq_fsbl.elf --fpga images/linux/VBase8fpga.bit --u-boot

When attempting to boot without this when the booting Linux code attempted to speak to some registers that it assumed would exist in the FPGA fabric.  But without the missing bitstream those registers didn't exist and so the boot failed because of some memory access error.

[Antti Lukats]

of course!

petalinux packager does not know if you want to inclde bitfile or not, as you may export with bitfile and not want to include it, so the tool can not know your intentiton, hence it does not do it.

so you have to include bitfile yourself.