TE0726 - ZynqBerry from Scratch

[sjoshi]

Hello,

I have procured the ZynqBerry module and am currently trying to get it to work for a simple VHDL based HDMIdriver. When I say simple, I mean I am not getting any data from a frame buffer. The aim is to hardwire a value to the RGB registers and hope that the screen maintains a constant colour. I have begun as follows:

I have used a clock generator block to generate 65 Mhz and 650 Mhz clocks for banging out the bits (1024 x 768 @60 Hz). I am stuck here though as I need a reference clock for my clock generator. I cannot find a signal from the schematics that I can use as an input for my clock generator. Can someone help me here?

Secondly, I have seen from the HDMI design provided that only one pin from the differential pair is assigned to an output. When I do that, the place and route system complains. What is going on here? I have basic experience of working with FPGAs and have never worked with differential signals. Could someone point out to me where I can get started? I can send you my vhdl code if you wish to go through it. I have found examples for the HDMI logic and encoding online that I have simply reworked for my purpose.

Best regards,
Shailesh

[Antti Lukats]

We have a working example design.
Please start working from there.

Zynq PS provides clocks to FPGA aftet FSBL execution, this is basics of any Zynq design, if PS has executed any FSBL code, there are no clocks to use.

[sjoshi]

Hello Antti,

thanks for the prompt reply. As luck would have it I figured out about the differential signals and the PS PL clocks after I posted the issue (Murphy's law of forums).

I will first try to run a simple PS to test if my HDMI code works before moving on to the examples provided.

I tried working with the examples in the past but had some problems. For a newbie like me (I have worked with MicroBlaze cores before), it is very difficult to figure out what to do with all the batch files provided. Is it documented somehwere? If you can guide me, I am willing to write a howto so that users with very basic Vivado  skills can get the projects or similar projects up and running.

Best regards,
Shailesh

[Antti Lukats]

1) download our ref design
2) start "vivado_create_project_guimode.cmd" ONCE
3) enjoy

after step 2, you do not need to use any of TCL any more if you do not want. just use mause and work normally in Vivado.

I am sorry, but we can not make it any simpler than that.

download, start, enjoy

thats it.

[sjoshi]

Thanks again Antti.

It is the enjoy stage that I am having a problem with.

I would proceed as follows:
1) generate a bit stream for the design.
2) Export it to SDK
3) Add a bsp and the app provided
4) Build everything and link the elf file
5) Generate the bitstream again
6) Program te ZynQBerry

Is this approach correct?

Best regards,
Shailesh

[Antti Lukats]

Thanks again Antti.

It is the enjoy stage that I am having a problem with.

I would proceed as follows:
1) generate a bit stream for the design.
2) Export it to SDK
3) Add a bsp and the app provided
4) Build everything and link the elf file
5) Generate the bitstream again
6) Program te ZynQBerry

Is this approach correct?

Best regards,
Shailesh

yes-no.

1 what you export is HDF file, this HDF may include BIT file, but doesnt have to, it can be plaind HDF (a zip file!) without any bitfile..
5 after build and export in vivado you do not need back to vivado, the BIT file doesnt need to be changed, you already have it, you just create boot.bin in SDK

aaah, if you want to use microblaze, then yes you need to "assotiate" the elf file and rebuild bitstream, but on zynqberry its better to use PS Arm cores..

[sjoshi]

Hello Antti,

the synthesis and implementation generate critical warnings due to missing constraints fro ddr and fixed io. should i ignore this or can I download the pin assignments somewhere?

Best regards,
Shailesh

[Antti Lukats]

ignore. its known viva-bug.

[sjoshi]

Hello Antti,

thanks a lot for your help today. I have managed to get something on the HDMI going. I am sure if that is the intended image though. You can see it in the attachments. I am currently using a hdmi to dvi adapter.

Best regards,
Shailesh

[Antti Lukats]

way to go real noise

I do not know either..

[sjoshi]

Hello Antti,

I have dug a little further and made some progress. I have noticed a few things:

1) The board has been programmed with a boot file which shows a "HDMI on Zynq Made with Simply" message by default.

2) Then I noticed that in the file vdma.c, the section where the frame buffer is being written has been commented out. I wrote a constant value here and could see rgb and their combinations. I have noticed though that the colour depth is very low and tht I can only show 8 distinct colours. The monitor and DVI adapter work normally for a Windows PC. I figured out that a value of 0x7f for a colour makes that coulored segment inactive while 0x80 activates it. It feels like just the MSB is being sent out on the R,G and B lines. Are there any settings to remedy this?

Best regards,
Shailesh

[Antti Lukats]

hi

we had initially a very simple HDMI alive test design, it had 8 colors.

right it is about to get uploaded a demo with full color and full debian jessie support..

the snow did come as the FSBL did not load an imaged from SPI flash, simple as that

br
Antti

[sjoshi]

Hello Antti,

Thanks for the confirmation. I now look forward to the update. You guys are doing some great stuff. Keep it going

Best regards,
Shailesh

[sjoshi]

One more thing. Are sizes other than 800*600 supported as of now? If yes, where do I need to change the parameters?

Best regards,
Shailesh

[Antti Lukats]

HARDWARE wise any size are supported as long as the HDMI clock is not too high for the given resolution.

It is however not so easy to change the size, as both clock and video timings have to be changed both in the hardware side as in the software/drivers

[sjoshi]

Hallo Antti,

I am beginning to understand a bit more with every interaction. I now know why the clock generator only generates a clock of 200 MHz instead of 400 MHz for banging out the HDMI bits. I still dont understand the HDMI inner workings as well as I should be. I am guessing that you plan to ramp up this clock to 400 MHz to deliver 24 bit performance? Also, I see that the video clock generator is set to 800*600. Isn't this where I have to change the size in hardware?

I first tried to implement a crude design at 400 MHz but had timing issues. Would it be possible to have something like the ADV7511 on a future version to take care of HDMI? That way, one can begin developing for the ARM directly.

Best regards,
Shailesh

[Antti Lukats]

full HD performance is possible, but you can not select some random clocks, they ALL have to be CORRECT, or you get no picture.

On the downloads there are prebuilt files for Debian 8.4 Jessie, the screen resolution is pretty high already. The vivado project for the design used for the Debian demo, is coming also, was supposed to be today, but got delayed.

Again there is nothing wrong with the HDMI on Zynqqberry, it does support full HD. It can not go as high on bitrate as ADV7511, thats an compromise on what is doable with the PCB space and BOM cost limits.

for the DEMO desing we have set the screen as:

   // -- 512M (-02M modules) --
              framebuffer0: framebuffer@0x1FC00000 {
      compatible = "simple-framebuffer";
      // -- 512M (-02M modules) --
      reg = <0x1FC00000 (1280 * 720 * 4)>;   // 720p
      width = <1280>;                // 720p
      height = <720>;                // 720p
      stride = <(1280 * 4)>;              // 720p
      format = "a8b8g8r8";
   };

1280x720
24 bit Color

maybe higher resolutions are possible also, we have not tried.