Hi
the old and now deprecated reference design PS configuration does not expose SD_WP pins to EMIO, they are marked as "not used" - one could think that this is valid, and all software drivers should recognize that, but it is not the case.
Card Detect and WP for SDIO_0 (SDIO_1 when eMMC is uses) _should_ be set to EMIO, and in the FPGA design they should be routed to IO or terminated as needed. New 2014.2 reference designs do this properly.
If WP is not selected as EMIO, then it is maybe auto assigned to MIO0 ? can you try keeping MIO0 as GND?
We have not checked is that is the case, but if it is then MIO0=GND would make the card rw