Author Topic: TE0720 AXI Direct Memory Access (DMA) Controller not working (Linux not booting)  (Read 5082 times)

chris_muc

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Is anyone successfully using the AXI Direct Memory Access Controller IP block on the TE0720 board with Petalinux?

As soon as I instantiate the DMA controller in my design, the Linux kernel is not booting any more.
The System gets stuck with U-Boot saying "Starting Linux Kernel...".

If I comment the DMA controller entry out in the device tree, the kernel boots normally.
Surprisingly, a similar design works fine on a Xilinx ZC706 board.

I tried out Vivado 2014.4 with Petalinux 2014.4, as well as Vivado 2014.2 with Petalinux 2014.2 and get the same behaviour with both setups.
Any ideas?


lcn

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Same issue.. We have also an AD-FMCOMMS3-EBZ FMC card and a  custom FMC card with some Analog Devices parts. I use Vivado 2014.2 for create a basic project with an ADI controller for the ADV7511. Finally, I could compile the Kernel from xilinx and Analog Devices repositories and boots correctly without DMA controller for HDMI interface at device tree.

When I add the DMA controller entry in device  tree, the Kernel hangs at "Starting Linux Kernel..."

Any ideas would be kindly appreciate!!


Antti Lukats

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so far xilinx and ADI repositories have been out of sync and not compatible all the time, causing tons of issues.

We have never had luck when "mixing" xilinx with ADI branches.


lcn

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I did some changes at the axi-vdma devicetree entry and the Kernel boots succesfully.

This is the old  axivdma entry:

axi_vdma_0: axivdma@43000000 {
         compatible = "xlnx,axi-vdma";
         #address-cells = <1>;
         #size-cells = <1>;
         #dma-cells = <1>;
         #dma-channels = <1>;
         reg = <0x43000000 0x1000>;
         xlnx,include-sg = <0x0>;
         xlnx,num-fstores = <0x3>;
         dma-channel@43000000 {
            compatible = "xlnx,axi-vdma-mm2s-channel";
            interrupts = <0 29 0x4>;
            xlnx,datawidth = <0x40>;
            xlnx,genlock-mode = <0x0>;
            xlnx,include-dre = <0x0>;
         };
      };

And I change it for this one:

axi_vdma_0: axivdma@43000000 {
         #address-cells = <1>;
         #size-cells = <1>;
         #dma-cells = <1>;
         compatible = "xlnx,axi-vdma";
         ranges = < 0x43000000 0x43000000 0x10000 >;
         reg = < 0x43000000 0x10000 >;
         xlnx,flush-fsync = <0x1>;
         xlnx,include-sg = <0x0>;
         xlnx,num-fstores = <0x3>;
         dma-channel@43000000 {
            compatible = "xlnx,axi-vdma-mm2s-channel";
            interrupt-parent = <&ps7_scugic_0>;
            interrupts = < 0 29 4 >;
            xlnx,datawidth = <0x40>;
            xlnx,device-id = <0x0>;
            xlnx,genlock-mode = <0x0>;
            xlnx,include-dre = <0x0>;
         };
      };

Hope this helps!

Antti Lukats

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this is exactly that kind of changes that we have been had to fight also, PCIe core on 2014.2 had similar devicetree bad entries..

sounds like good advice- thank you a lot for posting!