Hi Oleksandr,
thanks for the reply. I choose the part as described. But:
I am doing the standard "Hello World" application (as presented by XILINX on Youtube)
when I add the ZYNQ processing system IP, the "optimize" function does not work. No presets are assigned.
It looks like, it needs a board XPS description, that the part description does not deliver. As a result, no ports are mapped-
As a result, when I generate the bitsream, it throws the error:
" [Drc 23-20] Rule violation (NSTD-1) Unspecified I/O Standard - 32 out of 162 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O..., use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1]. ...
But issuing the tcl commands does not help either.
Pardon my questions, I am a real newbie here.