TEIB0006 + TEI0006 testing with SFP modules

[guirenaud]

Hello

We are using the TEIB0006 carrier with the TEI0006 SOM module and start writing HDL code.
In the example design there s no implementation of the SFP modules. I there any other design example you can provide implenting those (and also I2C expenders communication) ?

Thanks for your help

Guillaume 

[RC]

Hello Guillaume,

We have an SFP loopback implementation, which is used for internal functional test of TEIB0006. If this would be helpful for your design, please email support@trenz-electronic.de so we can send the files as attachments.

[guirenaud]

Hello

We are using the TEIB0006 carrier with the TEI0006 SOM module and start writing HDL code.
In the example design you provided, the implementation of the SFP modules over I2C (over I2C Mux and I2C extender) is done with the Nios core. We'll not use the Nios core in our design.
Is there any other design example you can provide implenting those directly in the FPGA Logic layer ?

Thanks for your help

Guillaume

[RC]

Hello,

As we previously mentioned, this design is intended for product testing. So, the I2C operation is actually not necessary for SFP communication. In this design, I2C is used to read/write the EEPROM inside a 10G SFP+ Passive Loopback Testing Module in order to check the contact of the SFP0/1_SCL and SFP0/1_SDA pins.

I have highlighted the relevant IP cores for actual SFP data transmission in the attached image. Please review their connections and settings, and refer to Intel Document 683054 (Intel® Cyclone® 10 GX Transceiver PHY User Guide) for more information.

Regarding NIOS:

In this design, axi_prbs_gtx generates a data sequence. Data is sent to the loopback module via SFP, returned to the transceiver, and sent back to axi_prbs_gtx for comparison. NIOS only controls the start timing of the sequence and reads the comparison results. You can replace the NIOS control with your own pure FPGA logic as preferred