TE0818 SOM+TEBF0818 Carrier UART-PMOD routing

[agamboa]

Hello,

I am working with the TE0818 SOM and the TEBF0818 Carrier.

I want to use the UART1 of the MPSoC for communicating with an external device through a RS422 serial communication. But I am not certain of the connections.

Is the UART1 pins available on the carrier as ports? or any other connection?

I do not see that the UART1 is routed to the Carrier nor to any available connection, so my first idea is to route the UART1 through the PMOD connector and use a a RS422 converter (https://digilent.com/reference/pmod/pmodrs485/start).

Is this possible? Are even the PMOD (P2) pins usable for custom PL logic? I am not able to find which MPSoC pins are connected to the PMOD connector.

Is there anything that prevents from using the UART1 as it might be needed for something else? I would be able to use a PL UART instead.

Best regards.

[Antti Lukats]

Hi

yes, it is possible to use this adapter to provide UART on PMOD on TEBF0818. Look schematic page 27, there you see that EX_IO5..EX_IO8 goto to level shifter that is connected to FPGA HP bank IO's. You need to configure this level shifter for each bit direction and use EMIO routing in the PL fabric, then it all works.

[agamboa]

This is great news! Thank you very much!

I was also wondering about the EX_IO1..EX_IO4 outputs of the PMOD connector, these are connected directly to one of the CPLDs on the carrier. Can these pins be managed by the MPSoC? Is the CPLD acting here as a level shifter too?

Best regads.

[Antti Lukats]

This is great news! Thank you very much!

I was also wondering about the EX_IO1..EX_IO4 outputs of the PMOD connector, these are connected directly to one of the CPLDs on the carrier. Can these pins be managed by the MPSoC? Is the CPLD acting here as a level shifter too?

Best regads.

yes optionally those can be accessed from the FPGA as well, but you would need to modify the CPLD code for that access. So it easier to use EX_IO5..8

[agamboa]

Thank you very much for your help Mr. Lukats,

I think I will need access also to the EX_IO1..4 for other purposes, such as maybe connect another PMOD device.

I have been checking the schematics and the wiki, and I have seen that the EX_IO1..4 are connected to the CPLD Master device. This device only has the MIO26..29 connected to the MPSoC, but these are shared with the PJTAG.

If I manage to edit the code, and connect the EX_IO1..4 to the MIO26..29, will I lose the ability to use the JTAG? At the time I do not use the PJTAG port (J17 or J30 *) of the carrier, and I do not expect to use it, but I do use the JTAG/UART (J12) to reboot the board through the XSCT tool. Would I still be able to debug too?

* PJTAG is mentioned to be connector J17 in this wiki (https://wiki.trenz-electronic.de/display/PD/TEBF0818+CPLD#TEBF0818CPLD-JTAG:~:text=FMC%20JTAG%20Access-,PJTAG,-on%20connector%20J17) and connector J30 on this other wiki (https://wiki.trenz-electronic.de/display/PD/TEBF0818+Getting+Started#TEBF0818GettingStarted-JTAG/UART:~:text=J30%20%2D-,PJTAG,-14)

Best regards.

[Antti Lukats]

you can use those MIO pins and main JTAG at the same time. The PJTAG option has never been used as far as I know.

[agamboa]

Thank you so much for your help, with this I can try and adapt it.

Best regards!