External Free-Running Clock for Debug Hub/ILA in Aurora Design Without FSBL

[cristina]

Hello everyone,

I'm working with the TE0808-05-BBE81-E module (Zynq UltraScale+ XCZU15EG-1FFVC900E) and trying to implement the Aurora protocol to interface with a TYPHOON HIL 606 system.

I have successfully verified the transceivers using the provided reference designs and managed to run the IBERT example with a BOOT.bin file from SD. However, when following the Aurora reference project (xapp1331_aurora_GTY_US.zip), there is no Block Design, so I cannot generate the FSBL or BOOT.bin, and therefore, PS clocks are not initialized.

I read that in this situation, the debug hub/ILA requires a free-running clock that is independent of FSBL/PS.
I have tried two different external clocks from the board (one is connected to Bank 64, pin AG5), but I keep getting the following warnings in Vivado:

WARNING: [Labtools 27-3361] The debug hub core was not detected.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active.
2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device.  To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'.
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
WARNING: [Labtools 27-3413] Dropping logic core with cellname:'chipscope1.i_ila' at location 'uuid_55A98D088CDB56E7B5902E18F8397FE6' from probes file, since it cannot be found on the programmed device.
WARNING: [Labtools 27-3413] Dropping logic core with cellname:'chipscope1.i_vio' at location 'uuid_ABE4809A414850C983A908D625BF2BBA' from probes file, since it cannot be found on the programmed device.

Can anyone confirm which external clock (name, bank/pins) should be used on this module to guarantee the debug hub and ILA cores will function without FSBL?
Is there any official list or proven experience indicating which clocks are safe to use for debug on the TE0808?

Any guidance or experience would be greatly appreciated, as I would like to avoid further trial and error.

Thank you very much in advance!